mc33910bac/r2 Freescale Semiconductor, Inc, mc33910bac/r2 Datasheet

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mc33910bac/r2

Manufacturer Part Number
mc33910bac/r2
Description
Lin System Basis Chip With 2x60ma High Side Drivers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
LIN System Basis Chip with
2x60mA High Side Drivers
Basis Chip (SBC), that combines many frequently used functions in
an MCU-based system, plus a Local Interconnect Network (LIN)
transceiver. It has a 5.0V, 60mA low dropout regulator with full
protection and reporting features. The device provides full SPI-
readable diagnostic and a selectable timing watchdog for detecting
errant operation. The LIN Protocol Specification, version 2.0
compliant LIN transceiver has waveshaping circuitry that can be
disabled for higher data rates.
(PWM) are implemented to drive small loads. One high voltage input
is available for use in contact monitoring or as external wake-up input.
This input can be used as high voltage Analog Input as well. The
voltage on this pin is divided by a selectable ratio and available via an
analog multiplexer.
available); Sleep (V
sense and forced wake-up) and Stop (V
capability, wake-up via CS, LIN bus, wake-up input, cyclic sense,
forced wake-up and external reset).
Features
The 33910 is a Serial Peripheral Interface (SPI)-controlled System
Two 60mA high side switches with optional pulse-width modulation
The 33910 has three main operating modes: Normal (all functions
The 33910 is compatible with LIN Protocol Specification 2.0.
• Two 60mA high side switches
• One high voltage analog/logic input
• Full-duplex SPI at frequencies up to 4MHz
• LIN transceiver capable of up to 100kbps with wave shaping
• Configurable window watchdog
• 5.0V low drop regulator with fault detection and low voltage
• Switched/protected 5.0V output (used for Hall sensors)
• Pb-free packaging designated by suffix code AC
reset (LVR) circuitry
DD
off, wake-up via LIN, wake-up input (L1), cyclic
V
BAT
MCU
Figure 1. 33910 Simplified Application Diagram
DD
on with limited current
VS1
VS2
VDD
PWMIN
ADOUT0
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
RST
33910
WDCONF
VSENSE
HVDD
HS1
HS2
LIN
L1
MC33910BAC/R2
MC34910BAC/R2
Device
LIN INTERFACE
SYSTEM BASIS CHIP WITH LIN
ORDERING INFORMATION
AC SUFFIX (Pb-FREE)
2
ND
- 40°C to 125°C
98ASH70029A
- 40°C to 85°C
Document Number: MC33910
Temperature
32-PIN LQFP
33910
GENERATION
Range (T
A
)
Rev. 4.0, 2/2008
Package
32-LQFP

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mc33910bac/r2 Summary of contents

Page 1

... Figure 1. 33910 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2007. All rights reserved. on with limited current DD Device MC33910BAC/R2 MC34910BAC/R2 33910 VSENSE VS1 HS1 VS2 ...

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INTERNAL BLOCK DIAGRAM RST IRQ INTERRUPT CONTROL MODULE LVI, HVI, HTI, OCI RESET CONTROL MODULE LVR, HVR, HTR, WD WINDOW WATCHDOG MODULE PWMIN MISO MOSI SPI & CONTROL SCLK CS ADOUT0 WAKE-UP MODULE RXD LIN PHYSICAL LAYER TXD LGND Figure ...

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RXD 1 TXD 2 MISO 3 MOSI 4 SCLK ADOUT0 7 PWMIN 8 Table 1. 33910 Pin Definitions A functional description of each pin can be found in the Pin Pin Name 1 RXD Receiver Output 2 ...

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PIN CONNECTIONS Table 1. 33910 Pin Definitions A functional description of each pin can be found in the Pin Pin Name 12 WDCONF Configuration Pin 13 LIN 14 LGND 18 PGND Power Ground Pin 23 L1 24, 25 HS2, HS1 ...

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Table 2. Maximum Ratings All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Ratings ELECTRICAL RATINGS Supply Voltage at VS1 and VS2 Normal Operation (DC) Transient ...

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ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 2. Maximum Ratings (continued) All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Ratings THERMAL RATINGS (10) Operating Ambient Temperature (10) ...

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STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic SUPPLY VOLTAGE RANGE (VS1, VS2) Nominal ...

Page 8

ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic (23) VOLTAGE REGULATOR ...

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Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic RST INPUT/OUTPUT PIN (RST) VDD Low Voltage Reset ...

Page 10

ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic HIGH SIDE OUTPUT ...

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Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic WINDOW WATCHDOG CONFIGURATION PIN (WDCONF) External Resistor Range ...

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ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic LIN PHYSICAL LAYER, ...

Page 13

DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic ) SPI INTERFACE TIMING (Figure 13 ...

Page 14

ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic L1 INPUT Wake-up ...

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Table 4. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic LIN PHYSICAL LAYER: DRIVER CHARACTERISTICS FOR FAST SLEW ...

Page 16

ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS PGND NOTE: Waveform Per ISO 7637-2. Test Pulses 1, 2, 3a, 3b. Figure 4. Test Circuit for Transient Test Pulses (LIN) PGND NOTE: Waveform Per ISO 7637-2. Test Pulses 1, 2, 3a, 3b. Figure 5. Test ...

Page 17

TXD t BIT t BUS_DOM V LIN_REC t - MIN DOM LIN 58.1% V 40.0% V 28. MAX DOM RXD t RDOM Figure 7. LIN Timing Measurements for Normal Slew Rate TXD t BIT t BUS_DOM V ...

Page 18

ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS V LIN_REC V BUSrec V BUSdom RXD t RX_PDF V LIN_REC LIN VDD V LIN_REC LIN IRQ 33910 18 LIN BUS SIGNAL t RX_PDR Figure 9. LIN Receiver Timing 0.4 V SUP DOMINANT LEVEL t WL ...

Page 19

V SUP V DD RST Figure 12. Power On Reset and Normal Request Time-Out Timing WSCLKH LEAD SCLK t SISU MOSI UNDEFINED t VALID t SOEN MISO D0 Analog Integrated Circuit Device Data Freescale Semiconductor Figure 11. ...

Page 20

FUNCTIONAL DESCRIPTION INTRODUCTION The 33910 is designed and developed as a highly integrated and cost-effective solution for automotive and industrial applications. For automotive body electronics, the 33910 is well suited to perform keypad applications via the LIN bus. Two power ...

Page 21

INTERRUPT (IRQ) The IRQ pin is a digital output used to signal events or faults to the MCU while in Normal and Normal Request Mode or to signal a wake-up from Stop Mode. This active low output will transition to ...

Page 22

FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION MC33910 - Functional Block Diagram MCU Interface and Output Control SPI Interface LIN Interface / Control Integrated Supply Analog Circuitry ANALOG CIRCUITRY The 33910 is designed to operate under automotive ...

Page 23

FUNCTIONAL DEVICE OPERATIONS INTRODUCTION The 33910 offers three main operating modes: Normal (Run), Stop, and Sleep (Low Power). In Normal Mode the device is active and is operating under normal application conditions. The Stop and Sleep Modes are low power ...

Page 24

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES Power Up POWER DOWN Legend WD: Watchdog WD Disabled: Watchdog disabled (WDCONF pin connected to GND) WD Trigger: Watchdog is triggered by SPI command WD Failed: No watchdog trigger or trigger occurs in closed window ...

Page 25

Table 5. Operating Modes Overview Function Reset Mode Normal Request Mode VDD full HVDD - HSx - Analog Mux - L1 - LIN - Watchdog - VSENSE On Notes 51. Operation can be enabled/controlled by the SPI. 52. Operation can ...

Page 26

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES temperature, the voltage regulator will be disabled and the voltage monitoring will issue a VDDOT Flag independently of the V voltage. DD Window Watchdog Overflow If the watchdog counter is not properly serviced while its ...

Page 27

Cyclic sense wake-up inputs • Force wake-up • LIN wake-up WINDOW WATCHDOG The 33910 includes a configurable window watchdog which is active in Normal Mode. The watchdog can be configured by an external resistor connected to the WDCONF pin. ...

Page 28

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES Interrupt Control HVSE Module MOD1:2 HSx Control HSxOP HSxCL Wakeup Module Open Load Detection Each high side driver signals an open load condition if the current through the high side is below the open load ...

Page 29

LIN PHYSICAL LAYER The LIN bus pin provides a physical layer for single-wire communication in automotive applications. The LIN physical layer is designed to meet the LIN physical layer specification and has the following features: • LIN physical layer 2.0 ...

Page 30

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES short the transmitter will not be shut down. The bit BAT LINOC in the LIN status register (LINSR) is set. If the bit LINM is set in the interrupt mask register (IMR) ...

Page 31

SPI AND CONFIGURATION The SPI creates the communication link between a microcontroller (master) and the 33910. The interface consists of four pins (see • — Chip Select CS • MOSI — Master-Out Slave-In CS MOSI MISO SCLK Read Data Latch ...

Page 32

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS . Table 6. System Status Register Adress(A3:A0) Register Name / Read / Write Information $ SYSSR - System Status Register Table 7 summarizes the SPI Register content for Control Information (C3:C0)=W ...

Page 33

REGISTER DEFINITIONS System Status Register - SYSSR The system status register (SYSSR) is always transferred with every SPI transmission and gives a quick system status overview. It summarizes the status of the voltage status register (VSR), LIN status register (LINSR) ...

Page 34

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS MOD2, MOD1 - Mode Control Bits These write-only bits select the Operating Mode and allow to clear the watchdog in accordance with Control Bits. Table 10. Mode Control Bits MOD2 MOD1 Description 0 ...

Page 35

LIN Control Register - LINCR This register controls the LIN physical interface block. Writing the LIN control register (LINCR) returns the LIN status register (LINSR). Table 14. LIN Control Register - $ Write LDVS RXONLY Reset 0 0 ...

Page 36

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS High Side Control Register - HSCR This register controls the operation of the high side drivers. Writing to this register returns the High Side Status Register (HSSR). Table 17. High Side Control Register ...

Page 37

CYSTx - Cyclic Sense Period Prescaler Select This write-only bits selects the interval for the wake-up cyclic sensing together with the bit CYSX8 in the configuration register (CFR) (see page 38). This option is only active if the high side ...

Page 38

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS MXx - Analog Multiplexer Input Select These write-only bits selects which analog input is multiplexed to the ADOUT0 pin according to When disabled or when in Stop or Sleep Mode, the output buffer ...

Page 39

Interrupt Mask Register - IMR This register allow to mask some of interrupt sources. The respective flags within the ISR will continue to work but will not generate interrupts to the MCU. The 5V Regulator over- temperature prewarning interrupt and ...

Page 40

TYPICAL APPLICATIONS LOGIC COMMANDS AND REGISTERS The 33910 can be configured in several applications. The figure below shows the 33910 in the typical Slave Node Application. VDD IRQ C4 C3 VDD RST IRQ RST PWMIN TIMER MISO MOSI SPI SCLK ...

Page 41

Important For the most current revision of the package, visit Available Documentation column select Packaging Information. Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGING PACKAGE DIMENSIONS www.Freescale.com and select Documentation, then under AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D ...

Page 42

IMPORTANT FOR THE MOST CURRENT REVISION OF THE PACK- AGE, VISIT WWW.FREESCALE.COM AND SELECT DOCUMENTA- 33910 42 PACKAGE DIMENSIONS (Continued) AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 43

Revision Date Description of Changes 9/2007 • Initial Release 3.0 2/2008 • Changed Functional Block Diagram on page 22. 4.0 Analog Integrated Circuit Device Data Freescale Semiconductor REVISION HISTORY REVISION HISTORY 33910 43 ...

Page 44

... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc., 2007. All rights reserved. ...

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