mc33789 Freescale Semiconductor, Inc, mc33789 Datasheet - Page 37

• Manufacturer Part Number: mc33789
• Description: Airbag System Basis Chip Sbc With Power Supply And Psi5 Sensor Interface
• Manufacturer: Freescale Semiconductor, Inc

POWER MODE CONTROL
activation of both boost and buck power supplies, based on
the voltages on the VPWR and WAKE pins.
input, and the detection threshold is normally V
the battery input at the VPWR pin exceeds the low-voltage
lockout threshold V
(logic high), both the boost and buck converters are started.
This low-voltage lockout threshold is also used as the ignition
status threshold. The MCU can receive an indication that the
threshold has been exceeded, when using the SPI STATUS
to read the IGNSTSAT status and receiving the signal IGN=1
(see
of the boost supply.
of the Wake-up signal.
scenarios in
Analog Integrated Circuit Device Data
Freescale Semiconductor
V
PWR
1. No change of sleep mode state, but current
2. The Sleep mode current returns to within specified
3. Power supply exits Sleep mode. Switches start
4. Sleep Reset is released and the entire system starts
5. The latched SPI command to turn off the switches
6. After the Wake signal stays low for more than 1.0 ms,
The suppression results of the above six marked
1.0 ms
WAKE
Table
Hysteresis is applied to prevent inadvertent deactivation
/2
consumption may exceed specification for sleep mode.
limits.
operating if applicable voltages exceed the under-
voltage lockout threshold, but the Sleep Reset is still
active, because of its 10 ms delay in response to the
Wake-up signal. The system stays in Sleep mode.
operating. After this point, a SPI command to turn off
switches would not be executed, but would be latched
and wait for the WAKE signal change to low.
would not be executed if the Wake signal has turned to
a low less than 1.0 ms.
the latched SPI command to turn off the switches is
executed and the system is turned off.
The 33789 Power Mode Control controls the start-up
The Wake input is a battery voltage, active-high logic
1
31).
Figure 25. Wake Glitch Suppression
Figure 25
2
BST_UV
Figure 25
3
1.0 ms
are:
, and the WAKE state is active
4
10 ms
shows the glitch suppression
1.0 ms
FUNCTIONAL DEVICE OPERATION
5
PWR
/2. When
6
OPERATING MODES
1.0 ms
t
active low signal Sleep Mode needs to be introduced.
Sleep Mode signal and the Wake signal, SPI Buck_off
command, and Sleep_Reset status.
control logic can be illustrated in the following diagrams.
Internal_
Reset
WAKE
SPI Buck_Off
Sleep_Reset
To simplify the power supply state diagrams, an internal
With the Sleep Mode signal, the 33789 power mode
Internal_
Reset
Internal_
Reset
Figure 26
Sleep Mode =1
V
BUCK_
Figure 27. Boost Control Logic Diagram
Figure 28. Buck Control Logic Diagram
Figure 29. VCC Control Logic Diagram
V
Figure 26. Sleep Mode Control Logic
CC
OK =1
_OFF
Boost_ON=0
Buck_ON=0
timeout
T2
shows the logic relation between the
Boost Thermal Shutdown =0
Buck Thermal Shutdown =0
Start 5ms T2 Timer
Delay
V
1ms
CC
_ON =0
Sleep Mode =0
Sleep Mode =1
V
Sleep Mode =1
V
FUNCTIONAL DEVICE OPERATION
BST
PWR
V
SPI BOE =1
BUCK_
V
> V
> V
CC_
S
R
BUCK_UV
V
Start 5ms T1 Timer
OV =0
OV =0
V
BST_UV
with UV masking
CC
SET
CLR
CC_
Ramp up
Sleep Mode =0
OV =1
Q
Q
T1 timeout
V
CC_
UV =1
Sleep Mode =0
Buck Thermal Shutdown =1
V
Sleep Mode =0
Boost Thermal Shutdown =1
V
SPI BOE =0
V
BUCK_
PWR
CC
OPERATING MODES
T1 timeout
V
1
0
=0
CC_
< V
V
V
V
OV =1
CC_
CC_
CC_
UV =0
BST_UV
UV =1
OV =1
OPEN =1
Boost_ON=1
Buck_ON=1
Sleep Mode
V
CC
_ON
33789
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