s1r72803 Epson Electronics America, Inc., s1r72803 Datasheet - Page 54

• Manufacturer Part Number: s1r72803
• Description: Link/transaction Controller
• Manufacturer: Epson Electronics America, Inc.

S1R72803F00A
PHY Core Interrupt Enable Flag Register
Chip Control Register
Bit7 Suspend
Bit6 Reserved
Bit5 Reserved
Bit4 Reserved
Bit3 Reserved
Bit2 IDE_MdlRst
Bit1 Send Ack_tardy Enable
Bit0 Soft Reset
50
Address Register Name
Address Register Name
Address Register Name
0x0F
0x0E
0x10
This register enables/disables an interrupt factor of the PHYIntStat Register.
Setting the corresponding bit to “1” enables an interrupt to the CPU.
The Chip Ctl Register controls the internal circuit of a chip.
Setting this bit to “1” stops the Sclk supplied from the PHY to this IC. At that time, the LPS signal must be
negated as well.
When a LINKOn packet is received, the CPU asserts the xINT. After asserting it, the firmware asserts the LPS
signal to the PHY and resume it by the Sclk supplied from the PHY. At that time, this bit must be set to “0”.
Setting this bit to “1” resets IDE-related registers (0x60 - 0x7F) to restore them to the initial state.
Makes setting to return an Ack_tardy as a Ack code when receiving an Async packet.
0: Usual Ack code
1: ack_tardy
Setting this bit to “1” initializes the interiors of the circuit. After initializing it, it is restored to “0”.
(Reserved)
ChipCtl
PhyIntEnb
7: EnSubGap
6: EnArbGap
5:
4:
3:
2: EnPhy_int
1: EnPhyWrDone
0: EnPhyRdDone
7:
6:
5:
4:
3:
2:
1:
0:
7: Suspend
6:
5:
4:
3:
2: IDE_MdlRst
1: SendTardy
0: SoftReset
Bit Symbol
Bit Symbol
Bit Symbol
R/W
R/W
R/W 0: Resume
R/W 0: None
R/W
R/W 0: Disable
R/W 0: Disable
R/W 0: Disable
R/W 0: Disable
R/W 0: Disable
W
W
0:
0:
0:
0:
0:
0:
0:
0:
0:
0:
0:
0:
0: None
0: None
0:
0:
0:
EPSON
Description
Description
Description
1:
1:
1:
1:
1:
1:
1:
1:
1: Suspend
1:
1:
1:
1:
1: IDE_Module Reset
1: Send Ack_tardy
1: Reset Start
1: Enable
1: Enable
1:
1:
1:
1: Enable
1: Enable
1: Enable
H.Rst S.Rst B.Rst
H.Rst S.Rst B.Rst
H.Rst S.Rst B.Rst
0x00 0x00
0x00 0x00
0x00 0x00
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–
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