lm4312 National Semiconductor Corporation, lm4312 Datasheet - Page 8

• Manufacturer Part Number: lm4312
• Description: Mobile Pixel Link Two Mpl-2 , Rgb Display Differential Interface Serializer With Optional Dithering And Look Up Table
• Manufacturer: National Semiconductor Corporation

www.national.com
OFF (O)
LINK-UP (LU)
ACTIVE (A)
BUS OVERVIEW
The LM4312 is a multi-lane MPL-2 Serializer that supports an
18-bit or 24-bit RGB source interface. The MPL-2 physical
layer is purpose-built for robustness, low power and low EMI
data transmission while requiring the fewest number of signal
lines. No external line components are required, as termina-
tion is provided internal to the MPL-2 receiver. The differential
interface conforms to the JEDEC SLVS (Scalable Low Volt-
age Signalling) Interface standard. A maximum raw through-
put of >900 Mbps (2-lane raw) is possible with this chipset.
The MPL-2 interface is designed for use with 80Ω to 100Ω
differential lines. Lines may be microstrip or stripline con-
struction.
SERIAL BUS TIMING
Data valid is relative to both edges of a RGB transaction as
shown in Figure 7. Data valid is specified as: Data Valid before
Clock, Data Valid after Clock, and Skew between data lines
should be less than 500ps.
SERIAL BUS START UP TIMING
In the Serial Bus OFF phase, SER differential outputs are all
driven to Ground.
When the SER is enabled, the differential outputs are driven
to valid static High state until the SER PLL is locked. Then the
DC becomes active and data is streamed to the DES.
OFF PHASE
In the Serial Bus OFF phase, SER differential outputs are all
driven to Ground. Figure 9 shows the transition of the MPL-2
bus into the OFF phase.
Name
DC State
GND
A
L
FIGURE 8. MPL-2 - LM4312 Link Up Timing
DDn State
GND
X
L
TABLE 1. Link Phases
Link is Off
Start Up
Streaming Data
8
Phase Description
SERIAL BUS PHASES
There are three bus phases on the RGB MPL-2 serial bus.
These are determined by the state of the DC and DD lines.
The MPL-2 bus phases are shown in Table 1.
Link-Up is shown in Figure 8. The DC and DDn signals are
shown both as single-ended and differential waveforms.
FIGURE 9. MPL-2 - LM4312 Link Off Timing
FIGURE 7. Dual Link Timing
Pre-Phase
A, or LU
LU
O
30011603
30011606
Post-Phase
30011661
A or O
LU
O