adg5213bcpz-rl7 Analog Devices, Inc., adg5213bcpz-rl7 Datasheet - Page 17

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adg5213bcpz-rl7

Manufacturer Part Number
adg5213bcpz-rl7
Description
High Voltage Latch-up Proof, Quad Spst Switches Adg5212/adg5213
Manufacturer
Analog Devices, Inc.
Datasheet
ADG5212/ADG5213
TRENCH ISOLATION
NMOS
PMOS
In the ADG5212 and ADG5213, an insulating oxide layer
(trench) is placed between the NMOS and the PMOS transistors
of each CMOS switch. Parasitic junctions, which occur between
the transistors in junction isolated switches, are eliminated, and
the result is a completely latch-up proof switch.
In junction isolation, the N and P wells of the PMOS and NMOS
transistors form a diode that is reverse-biased under normal
P WELL
N WELL
operation. However, during overvoltage conditions, this diode
can become forward-biased. A silicon controlled rectifier (SCR)
type circuit is formed by the two transistors, causing a significant
amplification of the current that, in turn, leads to latch-up. With
TRENCH
trench isolation, this diode is removed and the result is a latch-
BURIED OXIDE LAYER
up proof switch.
HANDLE WAFER
Figure 32. Trench Isolation
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