pnx8510 NXP Semiconductors, pnx8510 Datasheet - Page 13

• Manufacturer Part Number: pnx8510
• Description: Analog Companion Chip
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 12612
Product data
The normal mode of operation is that the DV1 interface is routed to the primary video
data paths and the DV2 interface is routed to the secondary video data paths. The IC
however accepts also so called sliced data formats. A sliced data format contains two
single video data streams multiplexed together on a component basis. A more
detailed description of the arrangement of the components can be found in
Section
VMUXCTL (register offset 0x95) has to be set.
The De-Slice module essentially takes the two data streams apart by simply two to
one de-multiplexing. The routing of the resulting two video data streams is
determined by setting the SEL register bits in the primary and secondary video data
path apertures appropriately. Sliced data formats come in two different flavors: double
edge and qualified.
The double edge slice format has data changes on the positive and the negative
clock edge where as the qualified mode qualifies one data stream of the two
multiplexed ones with an active high on the HSYNC signal. To use this mode the
USE_QUALIFIER bit in the register INPCTL (offset 0x3A) must be set. The order of
the slice qualification can be changed by setting the QUAL_INVERT bit of the same
register (offset 0x3A).
Since each of the video input interfaces can accept sliced data formats a total of four
video data streams could be routed into the IC and two of them can be selected to be
forwarded to the primary and the secondary video display pipeline.
The structure of the video input module is shown in
Fig 11. Block diagram - video input module
secondary
RST SYNC
PRIMARY
data 1
D1-IN
input
O_E
O_E
7.1.2. To enable sliced data formats the SLICE_MODE bit of the register
8/10-bit mode
8/10-bit mode
SLICE_MODE
SECONDARY
DETECTION
DETECTION
RST SYNC
SLICE_MODE
SLICE_DIR
SAV-EAV
SAV-EAV
Rev. 04 – 12 January 2004
SLICE_DIR
REGISTER ARRAY PRIMARY
DE-SLICE
DE-SLICE
VBI DATA SLICER
VBI DATA SLICER
OUT-
SEL
OUT-
SEL
Figure
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
REGISTER ARRAY SECONDARY
11.
PNX8510/11
Analog companion chip
DEMUX_MODE
DEMUX_MODE
TTX data port
SEL1
SEL2
TTX data port
FORMATTER
FORMATTER
OUTPUT
OUTPUT
R/Y/Y
G/U/U-V
B/V
Y
U - V
MDB645
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