at88sa102s ATMEL Corporation, at88sa102s Datasheet
at88sa102s
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at88sa102s Summary of contents
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... Anti-clone authentication for daughter cards • Physical access control (electronic lock & key) 1. Introduction The AT88SA102S is a member of the CryptoAuthentication family of cost-effective authentication chips designed to securely authenticate an item to which it is attached. It can also be used to exchange session keys with some remote entity so that the system ...
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... Fuse Map The AT88SA102S incorporates 128 one-time fuses within the chip. Once burned, there is no way to reset the value of a fuse. Fuses, with the exception of the manufacturer ID and serial number bits initialized by Atmel, have a value of 1 when shipped from the Atmel factory and transition when they are burned. Bits 0-63 can never be read, while bits 64-128 can always be read ...
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... Table 1. The 128 fuses in the AT88SA102S chip are arranged in the following manner: Fuse # Name 0 BurnSecure Enable 1 BurnFuse Enable 2 63 Secret Fuses 64 86 Status Fuses 87 Fuse Disable 88 95 MfrID 96 127 Serial Number BurnSecure Enable BurnFuse Enable Secret Fuses Status Fuses 1. 2. Fuse Disable 8584A– ...
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... Key Values The values stored in the AT88SA102S internal key array are hardwired into the masking layers of the chip during wafer manufacture. All chips have the same keys stored internally, though the value of a particular key cannot be determined externally from the chip. For this reason, customers should ensure that they program a unique (and secret) number into the 64 secret fuses and they should store the Atmel provided key values securely ...
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... These include an active shield over the entire surface of the part, internal memory encryption, internal clock generation, glitch protection, voltage tamper detection and other physical design features. Pre-programmed keys stored on the AT88SA102S are encrypted in such a way as to make retrieval of their values via outside analysis very difficult. ...
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... The bit timings are designed to permit a standard UART running at 230.4K baud to transmit and receive the tokens efficiently. Each byte transmitted or received by the UART corresponds to a single bit received or transmitted by CryptoAuthentication. Refer to Applications Notes on Atmel’s website for more details. AT88SA102S [Preliminary] 6 8584A–SMEM–03/09 ...
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... AC Parameters WAKE LOGIC Ø LOGIC 1 NOISE SUPPRESION 8584A–SMEM–03/09 data comm t t WLO WHI START ZHI ZLO t BIT t START t t LIGNORE HIGNORE AT88SA102S [Preliminary] 7 ...
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... LIGNORE_S filter @ sleep IO Timeout t TIMEOUT Watchdog t WATCHDOG reset ‡ START, ZLO, ZHI & BIT are designed to be compatible with a standard UART running at 230.4K baud for both transmit and receive. AT88SA102S [Preliminary] 8 Direction Min Typ Max Unit To 60 CryptoAuthentication To 1 CryptoAuthentication To 4.1 4.34 4.56 CryptoAuthentication From 4 ...
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... MAX 0 ESD AT88SA102S [Preliminary] Unit Notes ° Voltage is applied to V pin cc mA When chip is in sleep mode, nA Vsig = 0.0V 3.7V. cc Voltage levels for wake token when chip sleep mode Voltage levels for wake token when chip is in ...
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... Sleep All other values are reserved and will be ignored. As the single signal wire may be shared with a CryptoAuthentication host chip, the AT88SA102S chip includes a PauseLong command which causes it to ignore all activity on the signal pin until the expiration of the watchdog timer. 3.1.1. Command Timing After a command flag is transmitted, a command block should be sent to the chip ...
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... Command was NOT properly received by CryptoAuthentication and should be re-issued by the system. No attempt was made to execute the command. , Atmel recommends that the input signal be brought below V SLEEP AT88SA102S [Preliminary] Description to t and will not respond to any transmit PARSE EXEC when the chip is asleep. ...
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... The pause state provides a mechanism for multiple AT88SA102S chips on the same wire to be selected and to exchange data with the host microprocessor. The PauseLong command includes an optional address field which is compared to the values in Fuses 84-87. If the two match, then the chip enters the pause state, otherwise it continues to monitor the bus for subsequent commands. The host would selectively put all but one AT88SA102S’ ...
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... CryptoAuthentication should go to sleep automatically. At this point Transmit token. The 0x11 status indicates that the WLO WHI delay with the IO signal idle in which case CryptoAuthentication may have TIMEOUT AT88SA102S [Preliminary there is an error PARSE EXEC . PARSE ...
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... The total size of the block for each of the commands is fixed, though that value is different for each command. If the block size for a particular command is incorrect, the chip will not attempt the command execution and return an error. AT88SA102S [Preliminary] 14 Meaning The Command code The first parameter – ...
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... Mode is encoded as follows: 8584A–SMEM–03/09 Size 1 0x08 Controls which fields within the chip are used in the 1 message. 2 Which internal key used in the message. 32 Input portion of message to be digested. Size 32 SHA-256 digest. AT88SA102S [Preliminary] Notes Notes 15 ...
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... If set and Fuse[87] is burned, include the 64 secret fuses and 24 status fuses (Fuse[0] through 4 Fuse[87]) in the message. Otherwise, the corresponding message bits are set to 0. Should be 0 3-0 If Fuse[87] is unburned, then the secret and status fuses are NOT included in the message and they are replaced with 0’s. AT88SA102S [Preliminary] 16 Meaning 8584A–SMEM–03/09 ...
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... Reads four bytes from the ROM. Bit 1 of the address parameter must be 0. Reads the value of 32 fuses. Bit 1 of the address parameter must be 1. The input address parameter << 5 provides the fuse number corresponding to the LSB of the first returned byte. AT88SA102S [Preliminary] Notes Notes Notes ...
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... The power supply must EXEC_FUSE Size 1 0x04 1 Which bit within fuse array, minimum value is 64, and maximum value is 86. 2 Must be 0x00 00 0 Upon successful execution, a value of 0 will be returned by the AT88SA102S. Notes Notes 8584A–SMEM–03/09 EXEC_FUSE ...
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... Size 1 0x20 1 Must be 0x00 2 Identification number of the personalization key to be loaded. Seed for digest generation. The least significant bit of the last byte is 16 ignored by the AT88SA102S. Upon successful execution of HOST0, a value of 0 will be returned by the AT88SA102S. AT88SA102S [Preliminary] Notes Notes 19 ...
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... If a bit in the map is set to a ‘1’, then the corresponding fuse is burned, else that bit is ignored. The first bit sent to the AT88SA102S corresponds to Fuse[0] and Fuse[87]. ...
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... During execution of this command and while in the pause state the chip will ignore all activity on the IO signal. This command is used to prevent bus conflicts in a system that also includes other AT88SA102S chips or a CryptoAuthentication host chip sharing the same signal wire. ...
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... These dimensions apply to the flat section of the lead bet w een 0.08 mm and 0.15 mm from the lead This drawing is for general information only. Refer to JEDEC Drawing TO-236, Variation AB for additional information. Package Drawing Contact: packagedrawings@atmel.com R AT88SA102S [Preliminary ...
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... Revision History Table 22. Revision History Doc. Rev. Date 8584A 03/2009 8584A–SMEM–03/09 AT88SA102S [Preliminary] Initial document release. Comments 23 ...
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... Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2009 Atmel Corporation. All rights reserved. Atmel®, Atmel logo and combinations thereof, and others are registered trademarks, CryptoAuthentication™, and others, are trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. ...