W83627F Information Storage Devices, Inc, W83627F Datasheet - Page 13

• Manufacturer Part Number: W83627F
• Description: LPC Interface I/o Plus Kbc, Game Port, Midi Port
• Manufacturer: Information Storage Devices, Inc

1.1 LPC Interface
1.2 FDC Interface
CLKIN
PME#
PCICLK
LDRQ#
SERIRQ
LAD[3:0]
LFRAME#
LRESET#
SUSCLKIN
DRVDEN0
DRVDEN1
SMI#
(IRQIN1)
GP27
INDEX#
MOA#
SYMBOL
SYMBOL
18
19
21
22
23
24-27
29
30
75
1
2
3
4
PIN
PIN
IN
OD
IN
O
I/O
I/O
IN
IN
IN
OD
OD24
OD24
INt
I/OD24t
IN
OD
12p3
t3
tsp3
tsp3
tsp3
tsp3
csu
I/O
I/O
12tp3
12tp3
12p3
24
24
System clock input. According to the input frequency 24MHz or
48MHz, it is selectable through register. Default is 24MHz input.
Generated PME event.
PCI clock input.
Encoded DMA Request signal.
Serial IRQ input/Output.
These signal lines communicate address, control, and data
information over the LPC bus between a host and a peripheral.
Indicates start of a new cycle or termination of a broken cycle.
Reset signal. It can connect to PCIRST# signal on the host.
32khz clock input , for CIR only.
Drive Density Select bit 0.
Drive Density Select bit 1. (Default)
System Management Interrupt
(Interrupt channel input. For C version only)
General purpose I/O port 3 bit 6.
This Schmitt-triggered input from the disk drive is active low when
the head is positioned over the beginning of a track marked by an
index hole. This input pin is pulled up internally by a 1 K
The resistor can be disabled by bit 7 of L0-CRF0 (FIPURDWN).
Motor A On. When set to 0, this pin enables disk drive 0. This is
an open drain output.
- 9 -
FUNCTION
FUNCTION
Publication Release Date:November 2002
W83627HF/F
Revision 2.0
resistor.