W83627F Information Storage Devices, Inc, W83627F Datasheet - Page 55

• Manufacturer Part Number: W83627F
• Description: LPC Interface I/o Plus Kbc, Game Port, Midi Port
• Manufacturer: Information Storage Devices, Inc

Bit 3: Disable temperature sensor 2 over-temperature (OVT) output if set to 1. Default 0, enable
OVT1 output through pin OVT#.
Bit 2: Over-temperature polarity. Write 1, OVT# active high. Write 0, OVT# active low. Default 0.
Bit 1: Reserved.
Bit 0: Reserved.
FAN IN/OUT and BEEP Control Register- Index 4Dh
Register Location:
Power on Default Value
Attribute:
Size:
Bit 7: Disable power-on abnormal the monitor voltage including V-Core A and +3.3V. If these voltage
exceed the limit value, the pin (Open Drain) of BEEP will drives 300Hz and 600Hz frequency
signal. Write 1, the frequency will be disable. Default 0. After power on, the system should set
this bit to 1 in order to disable BEEP.
Bit 6: Reserved.
Bit 5: FAN 3 output value if FANINC3 sets to 0. Write 1, then pin 18 always generate logic high
signal. Write 0, pin 18 always generates logic low signal. This bit default 0.
Bit 4: FAN 3 Input Control. Set to 1, pin 18 acts as FAN clock input, which is default value. Set to 0,
this pin 18 acts as FAN control signal and the output value of FAN control is set by this register
5.
Bit 3: FAN 2 output value if FANINC2 sets to 0. Write 1, then pin 19 always generate logic high
signal. Write 0, pin 19 always generates logic low signal. This bit default 0.
Bit 2: FAN 2 Input Control. Set to 1, pin 19 acts as FAN clock input, which is default value. Set to 0,
this pin 19 acts as FAN control signal and the output value of FAN control is set by this register
3.
Bit 1: FAN 1 output value if FANINC1 sets to 0. Write 1, then pin 20 always generate logic high
signal. Write 0, pin 20 always generates logic low signal. This bit default 0.
Bit 0: FAN 1 Input Control. Set to 1, pin 20 acts as FAN clock input, which is default value. Set to 0,
this pin 20 acts as FAN control signal and the output value of FAN control is set by this register
1.
7
6
4Dh
15h
Read/Write
8 bits
5
4
3
2
1
- 51 -
0
FANINC1
FANOPV1
FANINC2
FANOPV2
FANINC3
FANOPV3
RESERVED
DIS_ABN
Publication Release Date:November 2002
W83627HF/F
Revision 2.0
1 to
bit
bit
bit