lpc2364 NXP Semiconductors, lpc2364 Datasheet - Page 14

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lpc2364

Manufacturer Part Number
lpc2364
Description
Single-chip 16-bit/32-bit Microcontrollers; Up To 512 Kb Flash With Isp/iap, Ethernet, Usb 2.0, Can, And 10-bit Adc/dac
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 4.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Pad provides special analog functionality.
LPC2364_66_68_3
Product data sheet
Symbol
RTCK
RSTOUT
RESET
XTAL1
XTAL2
RTCX1
RTCX2
V
V
V
V
V
VREF
VBAT
SS
SSA
DD(3V3)
DD(DCDC)(3V3)
DDA
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a DAC input,
digital section of the pad is disabled.
5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output,
digital section of the pad is disabled.
Open-drain 5 V tolerant digital I/O I
functionality. When power is switched off, this pin connected to the I
Pad provides digital I/O and USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and
Low-speed mode only).
5 V tolerant pad with 5 ns glitch filter providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad with 20 ns glitch filter providing digital I/O function with TTL levels and hysteresis.
Pad provides special analog functionality.
Pad provides special analog functionality.
Pin description
Pin
100
14
17
22
23
16
18
15, 31,
41, 55,
72, 97,
83
11
28, 54,
71,
96
13, 42,
84
10
12
19
[7]
[8]
[8]
[8]
[8]
[9]
[10]
[11]
[12]
[13]
[13]
[13]
[1]
…continued
Ball
B2
-
F3
H2
G3
F2
G1
B3, B7,
C9, F1,
G7, J6,
K3
E1
A3, C10,
H9,
K2
A7, E4,
H6
E2
E3
G2
[1]
[7]
[8]
[10]
[11]
[13]
[13]
[8]
[12]
[8]
[8]
[13]
[9]
2
C-bus 400 kHz specification compatible pad. It requires an external pull-up to provide output
Type
I/O
O
I
I
O
I
O
I
I
I
I
I
I
I
Description
RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0]) to
operate as Trace port after reset.
RSTOUT — This is a 1.8 V pin. LOW on this pin indicates LPC2364/66/68
being in Reset state.
Note: This pin is available in LPC2364FBD100, LPC2366FBD100, and
LPC2368FBD100 devices only (LQFP package).
External reset input: A LOW on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
ground: 0 V reference.
analog ground: 0 V reference. This should nominally be the same voltage
as V
3.3 V supply voltage: This is the power supply voltage for the I/O ports.
3.3 V DC-to-DC converter supply voltage: This is the supply voltage for
the on-chip DC-to-DC converter only.
analog 3.3 V pad supply voltage: This should be nominally the same
voltage as V
voltage is used to power the ADC and DAC.
ADC reference: This should be nominally the same voltage as V
should be isolated to minimize noise and error. Level on this pin is used as
a reference for ADC and DAC.
RTC pin power supply: 3.3 V on this pin supplies the power to the RTC
peripheral.
Rev. 03 — 20 December 2007
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
SS
, but should be isolated to minimize noise and error.
DD(3V3)
2
C-bus is floating and does not disturb the I
but should be isolated to minimize noise and error. This
LPC2364/66/68
Fast communication chip
2
C lines.
© NXP B.V. 2007. All rights reserved.
DD(3V3)
14 of 50
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