lpc2361 NXP Semiconductors, lpc2361 Datasheet - Page 23

• Manufacturer Part Number: lpc2361
• Description: Single-chip 16-bit/32-bit Mcu; Up To 128 Kb ?ash With Isp/iap, Ethernet, Usb 2.0 Device/host/otg, Can, And 10-bit Adc/dac
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2361_62_3
Product data sheet
7.17.1 Features
7.18.1 Features
7.17 I
7.18 I
The LPC2361/62 each contain three I
The I
(SCL), and a serial data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver) or a transmitter with the
capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
controlled by more than one bus master connected to it.
The I
I
The I
The I
and one word select signal. The basic I
master, and one slave. The I
and receive channel, each of which can operate as either a master or a slave.
2
2
2
C-bus).
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C-bus serial I/O controllers
S-bus serial I/O controllers
I
I
devices connected to the same bus lines.
Easy to configure as master, slave, or master/slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
The interface has separate input/output channels each of which can operate in master
or slave mode.
Capable of handling 8-bit, 16-bit, and 32-bit word sizes.
Mono and stereo audio data supported.
The sampling frequency can range from 16 kHz to 48 kHz (16, 22.05, 32, 44.1,
48) kHz.
2
2
2
2
2
2
C0 is a standard I
C1 and I
C-bus is bidirectional, for inter-IC control using only two wires: a serial clock line
C-bus implemented in LPC2361/62 supports bit rates up to 400 kbit/s (Fast
S-bus provides a standard communication interface for digital audio applications.
S-bus specification defines a 3-wire serial bus using one data line, one clock line,
2
C-bus can be used for test and diagnostic purposes.
2
C2 use standard I/O pins and do not support powering off of individual
Rev. 03 — 11 November 2008
2
C compliant bus interface with open-drain pins.
2
S interface on the LPC2361/62 provides a separate transmit
2
C-bus controllers.
2
S connection has one master, which is always the
2
C is a multi-master bus, it can be
Single-chip 16-bit/32-bit MCU
LPC2361/62
© NXP B.V. 2008. All rights reserved.
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