78p2343jat Teridian Semiconductor Corporation, 78p2343jat Datasheet - Page 14

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78p2343jat

Manufacturer Part Number
78p2343jat
Description
3-port E3/ds3/sts-1 With Jitter Attenuator
Manufacturer
Teridian Semiconductor Corporation
Datasheet
78P2343JAT
3-port E3/DS3/STS-1 LIU
with Jitter Attenuator
PIN DESCRIPTION
RECEIVER PINS
NAME
CKREF
RCLKx
RNEGx
RPOSx
LINPx
LINNx
Page 14 of 37
27, 35
28, 36
29, 37
96, 90
95, 89
PIN
57
43
44
45
83
82
(continued)
TYPE
CIS
CO
CO
CO
A
2005 Teridian Semiconductor Corporation
DESCRIPTION
Reference Clock Input:
This clock should be from a clean source ( 20 ppm) and match the
selected line-rate frequency as follows:
Receive Clock:
Recovered receive clock output.
NOTE: During LOS conditions, RCLKx will continue to output a line
rate clock
Receive Negative Data:
When ENDECB =’1’, this pin indicates reception of a negative AMI pulse
on the coax.
When ENDECB =’0’, this pin outputs a one when a Receive Line
Code Violation (RLCV) is detected.
NOTE: During LOS conditions, RNEGx output is squelched
Receive Positive Data/NRZ Data:
When ENDECB =’1’, this pin indicates reception of a positive AMI pulse
on the coax cable.
When ENDECB =’0’, it outputs decoded NRZ data.
NOTE: During LOS conditions, RPOSx output is squelched
Line In:
Differential AMI Inputs. Should be 1:1 transformer-coupled and
terminated with a shunt resistor. See APPLICATION INFORMATION
section for more info.
E3 :
DS3:
STS-1: 51.840 MHz
34.368 MHz
44.736 MHz
Rev 2.2

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