sc16c554dbib64 NXP Semiconductors, sc16c554dbib64 Datasheet - Page 19

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sc16c554dbib64

Manufacturer Part Number
sc16c554dbib64
Description
5 V, 3.3 V And 2.5 V Quad Uart, 5 Mbit/s Max. With 16-byte Fifos
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
SC16C554B_554DB_3
Product data sheet
Fig 10. CTS functional timing waveforms
Fig 11. RTS functional timing waveforms, RCV FIFO trigger level = 1 byte, 4 bytes, or 8 bytes
(RD RBR)
CTS
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) If CTS goes HIGH before the middle of the last stop bit of the current byte, the transmitter finishes sending the current byte,
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
(1) N = RCV FIFO trigger level (1 byte, 4 bytes, or 8 bytes).
(2) The two blocks in dashed lines cover the case where an additional byte is sent as described in
TX
RTS
IOR
RX
but is does not send the next byte.
6.4.3 Enabling autoflow control and auto-CTS
6.4.4 Auto-CTS and auto-RTS functional timing
Start
Start
Remark: Auto-CTS is not supported in channel D of the HVQFN48 package, therefore
MCR[5] of channel D should not be written.
Autoflow control is enabled by setting MCR[5] and MCR[1].
Table 7:
The receiver FIFO trigger level can be set to 1 byte, 4 bytes, 8 bytes, or 14 bytes. These
are described in
bits 0 to 7
MCR[5]
1
1
0
byte N
Stop
Stop
Enabling autoflow control and auto-CTS
Figure 11
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
Start
MCR[1]
1
0
X
Rev. 03 — 1 September 2005
1
Start
byte N + 1
and
bits 0 to 7
2
Figure
Stop
12.
Stop
Selection
auto RTS and CTS
auto CTS
disable
SC16C554B/554DB
N
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
N + 1
Section 6.4.1
Start
Start
bits 0 to 7
byte
002aaa049
Stop
002aaa050
Stop
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