ht827a0 Holtek Semiconductor Inc., ht827a0 Datasheet - Page 10

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ht827a0

Manufacturer Part Number
ht827a0
Description
8-bit Microcontroller With Voice Rom
Manufacturer
Holtek Semiconductor Inc.
Datasheet
·
Stack register - Stack
The stack register is a special part of the mem-
ory used to save the contents of the program
counter (PC). This stack is organized into 8 lev-
els. It is neither part of the data nor program
space, and cannot be read or written to. Its acti-
vated level is indexed by a stack pointer (SP)
and cannot be read or written to. At a subrou-
tine call or interrupt acknowledgment, the con-
tents of the program counter are pushed onto
the stack. The program counter is restored to
its previous value from the stack at the end of a
subroutine or interrupt routine, which is sig-
naled by a return instruction (RET or RETI).
After a chip resets, SP will point to the top of
the stack.
Instruction(s)
TABRDC [m]
TABRDL [m]
Note:
Table location
Any location in the program ROM can be used
a s a l o o k - u p t a b l e . T h e i n s t r u c t i o n s
²TABRDC [m]² (the current page, 1 page=256
words) and ²TABRDL [m]² (the last page)
transfer the contents of the lower-order byte
to the specified data memory, and the
higher-order byte to TBLH (08H). Only the
destination of the lower-order byte in the ta-
ble is well-defined. The other bits of the table
word are transferred to the lower portion of
TBLH. The higher-order byte register
(TBLH) of the table is read only. The table
pointer (TBLP), on the other hand, is a
read/write register (07H) indicating the table
location. This location must be placed in
TBLP before accessing the table. All the table
related instructions require 2 cycles to com-
plete an operation. These areas may function
as a normal program memory depending
upon the user¢s requirements.
*12~*0: Bits of table location
@7~@0: Bits of table pointer
P12 P11 P10
*12
1
*11
1
*10
1
P9
*9
1
Table location
P8
*8
1
10
@7
@7
*7
Table Location
The interrupt request flag will be recorded but
the acknowledgment will be inhibited when the
stack is full and a non-masked interrupt takes
place. After the stack pointer is decremented
(by RET or RETI), the interrupt will be ser-
viced. This feature prevents stack overflow and
allows programmers to use the structure more
easily. In a similar case, if the stack is full and a
²CALL² is subsequently executed, stack over-
flow occurs and the first entry is lost.
Data memory - RAM
The data memory is further divided into two
functional groups, namely, special function reg-
isters and general purpose data memories. Al-
though most of them can be read or be written
to, some are read only.
The data memory size for HT827A0 is shown as
follows.
The special function registers include an indi-
rect addressing register (00H), timer/event
counter high byte register (TMRH; 0FH),
timer/event counter low byte register (TMRL;
10H); timer/event counter control register
(TMRC; 11H), program counter lower-order
byte register (PCL; 06H), memory pointer reg-
ister (MP; 01H), accumulator (ACC; 05H), table
pointer (TBLP; 07H), table higher-order byte
r e g i s t e r ( T B L H ; 0 8 H ) , s t a t u s r e g i s t e r
(STATUS; 0AH), interrupt control register
(INTC; 0BH), watchdog timer option setting
register (WDTS; 09H), I/O registers (PA; 12H,
PB; 14H, PC; 16H, PD; 18H, PE; 1AH) and I/O
P12~P8: Bits of current program counter
Pard No.
HT827A0
@6
@6
*6
@5
@5
*5
@4
@4
*4
00H~2FH
Special
RAM
@3
@3
*3
@2
@2
*2
RAM Address
30H~FFH
General
March 15, 2000
HT827A0
@1
@1
*1
@0
@0
*0

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