ht827a0 Holtek Semiconductor Inc., ht827a0 Datasheet - Page 14

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ht827a0

Manufacturer Part Number
ht827a0
Description
8-bit Microcontroller With Voice Rom
Manufacturer
Holtek Semiconductor Inc.
Datasheet
The timer/event counter interrupt request flag
(TF), external interrupt request flag (EIF), sam-
pling rate counter interrupt request flag (SRF),
enable timer/event counter bit (ETI), enable ex-
ternal interrupt bit (EEI), enable sampling rate
counter bit (ESI) and enable master interrupt bit
(EMI) make up an interrupt control register
(INTC) which is located at 0BH in the data mem-
ory. EMI, EEI, ESI and ETI are used to control
the enable/disable status of interrupts. These bits
prevent the requested interrupt from being ser-
viced. Once the interrupt request flags (TF, SRF,
EIF) are all set, they will remain in the INTC reg-
ister till the interrupts are serviced or cleared by
a software instruction.
The ²CALL subroutine² is preferably not used
within the interrupt subroutine. This is because
interrupts often occur in an unpredictable man-
ner or required to be serviced immediately in cer-
tain applications. If only one stack is left and
enabling the interrupt is not well controlled, op-
eration of the ²call² in the interrupt subroutine
will damage the original control sequence.
Oscillator configuration
The HT827A0 provides two kinds of oscillator cir-
cuits, namely, RC and crystal oscillators, for sys-
tem clocks. Selection of the oscillator circuit
type is determined by mask option. When the
device enters the HALT mode, the system oscil-
lator stops to conserve power. The system clock
is later reset with an external signal.
If an RC type of oscillator is used, an external
resistor between OSC1 and GND is required
and the range of the resistance has to be from
51kW to 1MW. The system, divided by 4, is
available on OSC2, which synchronizes exter-
nal logic. The RC type of oscillator provides the
most cost-effective solution. Nonetheless, the
No.
a
b
c
External Interrupt
Sampling Rate
Counter Overflow
Timer/Event
Counter Overflow
Interrupt
Source
Priority Vector
1
2
3
0CH
04H
08H
14
frequency of the oscillation may vary with
VDD, temperature and the chip itself due to
process variations. It is, therefore, not suitable
for timing sensitive operations where an accu-
rate oscillator frequency is demanded.
On the other hand, if a crystal type of oscillator
is used instead, a crystal across OSC1 and OSC2
is required, providing feedback and phase shift
for the oscillator. No other external components
are needed. The resonator can replace the crys-
tal and connects between OSC1 and OSC2 so
that a frequency reference can be derived. But
two external capacitors in OSC1 and OSC2 are
required.
The WDT oscillator is a free running on-chip RC
oscillator, requiring no external components. The
WDT oscillator still works a period of approxi-
mately 78ms even when the system enters the
power down mode and the system clock is termi-
nated. It nonetheless can be disabled by mask op-
tion for conserving power.
Watchdog timer - WDT
The clock source of WDT is implemented by a
dedicated RC oscillator (WDT oscillator) or in-
struction clock (system clock divided by 4), de-
cided by mask option. The watchdog timer is
designed to prevent a software malfunction or
sequence jumping to an unknown location with
unpredictable results. It can be disabled by
mask option. After it is disabled, all executions
related to WDT are ignored.
WDT is first divided by 256 (8 stages) to get a
nominal time-out period of 20 ms once an inter-
nal WDT oscillator (RC type of oscillator nor-
mally with a period of 78ms) is selected. This
time-out period may vary with temperature,
VDD and process variations. By invoking the
System oscillator
March 15, 2000
HT827A0

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