isplsi2096v-80lq128 Lattice Semiconductor Corp., isplsi2096v-80lq128 Datasheet - Page 2

• Manufacturer Part Number: isplsi2096v-80lq128
• Description: 3.3v High Density Programmable Logic
• Manufacturer: Lattice Semiconductor Corp.

Figure 1. ispLSI 2096V Functional Block Diagram
slew rate to minimize overall output switching noise.
Device pins can be safely driven to 5-volt signal levels to
support mixed-voltage systems.
Eight GLBs, 32 I/O cells, two dedicated inputs and two
ORPs are connected together to make a Megablock (see
Figure 1). The outputs of the eight GLBs are connected
to a set of 32 universal I/O cells by the two ORPs. Each
ispLSI 2096V device contains three Megablocks.
The GRP has as its inputs, the outputs from all of the
GLBs and all of the inputs from the bi-directional I/O cells.
All of these signals are made available to the inputs of the
GLBs. Delays through the GRP have been equalized to
minimize timing skew.
Clocks in the ispLSI 2096V device are selected using the
dedicated clock pins. Three dedicated clock pins (Y0, Y1,
Y2) or an asynchronous clock can be selected on a GLB
basis. The asynchronous or Product Term clock can be
generated in any GLB for its own clock.
In addition to the standard output configuration, the
outputs of the ispLSI 2096V are individually program-
mable, either as a standard totem-pole output or an
Programmable Open-Drain Outputs
Functional Block Diagram
TMS/IN 1
TDI/IN 0
RESET
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
ispEN
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
I/O 8
I/O 9
A0
A1
A2
A3
Output Routing Pool (ORP)
Input Bus
Output Routing Pool (ORP)
Input Bus
Routing
Global
(GRP)
Pool
2
open-drain output. The totem-pole output drives the
specified Voh and Vol levels, whereas the open-drain
output drives only the specified Vol. The Voh level on the
open-drain output depends on the external loading and
pull-up. This output configuration is controlled by a pro-
grammable fuse. When this fuse is erased (JEDEC “1”),
the output is configured as a totem-pole output. When
this fuse is programmed (JEDEC “0”), the output is
configured as an open-drain. The default configuration
when the device is in bulk erased state is totem-pole
configuration. The open-drain/totem-pole option is se-
lectable through the ispDesignEXPERT software tools.
Specifications ispLSI 2096V
Output Routing Pool (ORP)
Output Routing Pool (ORP)
Input Bus
Input Bus
B7
B6
B5
B4
0917/2096V
I/O 63
I/O 62
I/O 61
I/O 60
I/O 59
I/O 58
I/O 57
I/O 56
I/O 55
I/O 54
I/O 53
I/O 52
I/O 51
I/O 50
I/O 49
I/O 48