isplsi2096v-80lq128 Lattice Semiconductor Corp., isplsi2096v-80lq128 Datasheet - Page 9

• Manufacturer Part Number: isplsi2096v-80lq128
• Description: 3.3v High Density Programmable Logic
• Manufacturer: Lattice Semiconductor Corp.

1. NC pins are not to be connected to any active signal, VCC or GND.
Pin Description
I/O 0 - I/O 5
I/O 6 - I/O 11
I/O 12 - I/O 17
I/O 18 - I/O 23
I/O 24 - I/O 29
I/O 30 - I/O 35
I/O 36 - I/O 41
I/O 42 - I/O 47
I/O 48 - I/O 53
I/O 54 - I/O 59
I/O 60 - I/O 65
I/O 66 - I/O 71
I/O 72 - I/O 77
I/O 78 - I/O 83
I/O 84 - I/O 89
I/O 90 - I/O 95
GOE 0, GOE 1
IN 4, IN 5
ispEN
TDI/IN 0
TMS/IN 1
TDO/IN 2
TCK/IN 3
RESET
Y0, Y1, Y2
GND
VCC
NC
1
NAME
105,
115,
121,
128,
112
111,
84,
21,
27,
35,
41,
51,
57,
64,
71,
85,
91,
99,
80,
18,
95,
13,
19
20
48
77
15
14
7,
2,
PQFP & TQFP PIN NUMBERS
100,
106,
116,
122,
113
127
114
22,
28,
36,
42,
52,
58,
65,
72,
86,
92,
83,
34,
16,
49,
17
1,
8,
101,
107,
117,
123,
23,
29,
37,
43,
53,
59,
67,
73,
87,
93,
50,
31,
78
82
3,
9,
102,
108,
118,
124,
24,
30,
38,
44,
54,
60,
68,
74,
88,
94,
10,
63,
47,
4,
103,
109,
119,
125,
25,
32,
39,
45,
55,
61,
69,
75,
89,
96,
11,
79,
66,
5,
104
110
120
126
98,
81,
26
33
40
46
56
62
70
76
90
97
12
6
Input — This pin performs two functions. When ispEN is logic low, it
functions as a clock pin for the ISP/Boundary Scan state machine.
When ispEN is high, it functions as a dedicated input pin.
Input — This pin performs two functions. When ispEN is logic low, it
functions as a serial data input pin to load programming data into the
device. When ispEN is high, it functions as a dedicated input pin.
Input/Output Pins - These are the general purpose I/O pins used by the
logic array.
Global Output Enables input pins.
Dedicated input pins to the device.
Input — Dedicated in-system programming Boundary Scan enable input
pin. This pin is brought low to enable the programming mode. The TMS,
TDI, TDO and TCK controls become active.
Input — This pin performs two functions. When ispEN is logic low, it
functions as a mode control pin for the ISP/Boundary Scan state
machine. When ispEN is high, it functions as a dedicated input pin.
Output/Input — This pin performs two functions. When ispEN is logic
low, it functions as an output pin to read serial shift register data. When
ispEN is high, it functions as a dedicated input pin.
Active Low (0) Reset pin which resets all of the GLB and I/O registers in
the device.
Dedicated Clock input. This clock input is connected to one of the clock
inputs of all the GLBs on the device.
Ground (GND)
V
No Connect.
9
CC
Specifications ispLSI 2096V
DESCRIPTION
Table 2-0002-2096V