as6c1016 Alliance Memory, Inc, as6c1016 Datasheet - Page 8

• Manufacturer Part Number: as6c1016
• Description: 512k X 8 Bit Low P 64k X 16 Bit Low Power Cmos Sram
• Manufacturer: Alliance Memory, Inc

WRITE CYCLE 3
Notes :
1.WE#,CE#, LB#, UB# must be high during all address transitions.
2.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low.
3.During a WE# controlled write cycle with OE# low, t
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance
6.t
placed on the bus.
state.
OW
##Y W
1/ A
OCTOBER/2007, V 1.a
January 2007
OCTOBER 2007
4 x
and t
WHZ
are specified with C
(LB#
,UB#
A
Controlled)
C
L
= 5pF. Transition is measured ±500mV from steady state.
64K X 16 BIT LOW POWER CMOS SRAM
A
R
(1,2,5,6)
I
Alliance Memory Inc.
WP
A
must be greater than t
R
A
A
R
A
R
R
A
512K X 8 BIT LOW POWER CMOS SRAM
R
A
R
WHZ
4 D6 I
UA U T UK 4 #
+ t
DW
to allow the drivers to turn off and data to be
A
R
A
Page 8 of 13
AS6C1016