hsp50415 Intersil Corporation, hsp50415 Datasheet - Page 6

• Manufacturer Part Number: hsp50415
• Description: Wideband Programmable Modulator Wpm
• Manufacturer: Intersil Corporation

A MATLAB or Excel program for calculating the component
values is available. For improved APLL performance,
utilization of specific calculated values is recommended over
the general purpose ones shown in Figure 1.
Symbol NCO
As the data flows through the device, the sample rate
increases up to the final sample rate, with the SYMBOL
NCO generating all of the necessary intermediate sample
rate clocks. Each stage’s input and output sample rate is
dependent on the interpolation rate through the stage.
Figure 1 shows the various symbol clocks that are generated
on the chip. The symbol rate clock (symclk) used internally is
multiplied by 2 and output on pin 2XSYMCLK for use in
driving the input DATACLK if a symbol rate synchronous
(non-burst) mode is required.
NOTE: An optional decimate by two mode allows the device to achieve interpolation by a factor of two in the Shaping FIR.
2XSYMCLK
SYSCLK/2
DIN<15:0>
DATACLK
Internal IC signal names are shown in lowercase.
BYPASS FIR FILTER
0
0
0
0
0
0
0
0
1
1
INTERFACE
DATA
FIFO
÷
X 2
2
Q
I
TABLE 1. HSP50415 FILTER CONFIGURATIONS AND RESULTING SYMBOL NCO RATES
CONST.
MAP
FIR INTERPOLATION
6
Not applicable
Not applicable
x2 (Note)
x2 (Note)
x16
x16
x4
x8
x4
x8
FIR
(symbol rate)
symclk
FIGURE 1. SAMPLE RATE CLK GENERATION
I GAIN
SYMBOL NCO
HALFBAND
BYPASS HALFBAND
(symbol rate X 1,2,4,8,16,32)
HSP50415
FILTER
0
0
0
0
1
1
1
1
0
1
FILTER
INT.
The SYMBOL NCO is a 32-bit accumulator. The 32-bit
frequency step (Phinc) is the sum of the user programmable
32-bit symbol Phinc and any error term generated by the
Digital Phase Lock Loop (DPLL) while locking to an external
symbol rate. The DPLL error term may be disabled by a
control bit. The symbol rates supported are from 0.023Hz up
to 25MHz (for FSout of 100MHz) with 32-bit frequency
resolution. The formula for programming the symbol Phinc
register is given as:
symbolPhinc = (symbolRate / FSout) * 2^32
The SYMBOL NCO also has a counter mode in which the
symbol clocks are generated upon the counter reaching the
16-bit user programmable rollover count value. This mode is
useful for cases where the frequency is an integer number of
the system clock (SYSCLK/2).
DC TO 20MHz: C1=690PF, C2=11NF, R1=120Ω
20 TO 100MHz: C1=130PF, C2=2NF, R1=620Ω
COMPLEX
MIXER
INTERPOLATING FILTER
DATA INPUT RATE
Symbol Rate x 16
Symbol Rate x 32
Symbol Rate x 16
Symbol Rate x 4
Symbol Rate x 8
Symbol Rate x 4
Symbol Rate x 4
Symbol Rate x 8
Symbol Rate x 2
Symbol Rate x 1
SIN(X)
X
sysclk
I GAIN I OFFSET
PLLRC
SYMBOL NCO PHINC
C1
SELECTOR
BYPASS
PhincLL x 16
PhincLL x 32
PhincLL x 16
PhincLL x 4
PhincLL x 8
PhincLL x 4
PhincLL x 4
PhincLL x 8
PhincLL x 2
PhincLL x 1
APLL
12-BIT
DAC
C2
R1
April 23, 2007
FN4559.6
CLK
IOUTA
IOUTB