am79c981 Advanced Micro Devices, am79c981 Datasheet - Page 14

• Manufacturer Part Number: am79c981
• Description: Integrated Multiport Repeater Plus? Imr+? ??9
• Manufacturer: Advanced Micro Devices

Management Port
The IMR+ device management functions are enabled
when the TEST pin is tied LOW. The management com-
mands are byte oriented data and are input serially on
the SI pin. Any responses generated during execution of
a management command are output serially in a byte-
oriented format by the IMR+ device on the SO pin. Both
the input and output data streams are clocked with the
rising edge of the SCLK pin. The serial command data
stream and any associated results data stream are
structured in a manner similar to the RS232 serial data
format, i.e., one Start Bit followed by eight Data Bits.
The externally generated clock at the SCLK pin can be
either a free running clock synchronized to the input bit
patterns or a series of individual transitions meeting the
1–84
SCLK
SCLK
SO
SO
SI
SI
AMD
STRT D0
STRT D0
D1 D2 D3 D4 D5 D6 D7
D1 D2 D3 D4 D5 D6 D7
Command Execution Phase
Management Command Timing with No Response
Command Execution Phase
Management Command/Response Timing
PRELIMINARY
Am79C981
STRT D0
setup and hold times with respect to the input bit pattern.
If the latter method is used, it is to be noted that 20 SCLK
clock transitions are required for proper execution of
management commands that produce SO data, and
that 14 SCLK clock transitions are needed to execute
management commands that do not produce SO data.
Management Commands
The following section details the operation of each man-
agement command available in the IMR+ chip. In all
cases, the individual bits in each command byte are
shown with the MSB on the left and the LSB on the right.
Data bytes are received and transmitted LSB first and
MSB last. See Table 2 for a summary of the manage-
ment commands.
D1 D2 D3 D4 D5 D6 D7
STRT D0
Results Phase
Next Command Execution Phase
D1 D2 D3 D4 D5 D6 D7
Next Command
17306B-17
17306B-18