m36l0r7060t1 STMicroelectronics, m36l0r7060t1 Datasheet

no-image

m36l0r7060t1

Manufacturer Part Number
m36l0r7060t1
Description
128 Mbit Multiple Bank, Multilevel, Burst Flash Memory And 64 Mbit Burst Psram, 1.8 V Supply, Multichip Package
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
m36l0r7060t1ZAQ
Manufacturer:
ST
0
Part Number:
m36l0r7060t1ZAQ
Manufacturer:
ST
Quantity:
20 000
Part Number:
m36l0r7060t1ZAQF
Manufacturer:
ST
0
Features
Flash memory
May 2007
Multichip package
– 1 die of 128 Mbit (8 Mb x16, Multiple Bank,
– 1 die of 64 Mbit (4 Mb x16) Pseudo SRAM
Supply voltage
– V
– V
Electronic signature
– Manufacturer Code: 20h
– Top Device Code
– Bottom Device Code
Package
– ECOPACK®
Synchronous / Asynchronous Read
– Synchronous Burst Read mode: 54 MHz,
– Random Access: 70 ns, 85 ns
Synchronous Burst Read Suspend
Programming time
– 2.5 µs typical word program time using
Memory organization
– Multiple Bank memory array: 8 Mbit banks
– Parameter Blocks (top or bottom location)
Common Flash Interface (CFI)
100 000 program/erase cycles per block
Dual operations
– program/erase in one Bank while read in
– No delay between read and write
Multilevel, Burst) Flash memory
M36L0R7060T1: 88C4h
M36L0R7060B1: 88C5h
66 MHz
Buffer Enhanced Factory Program
command
others
operations
DDF
PPF
and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package
= 9 V for fast program
= V
CCP
128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory
= V
DDQF
= 1.7 to 1.95 V
Rev 1
PSRAM
Security
– 64 bit unique device number
– 2112 bit user programmable OTP Cells
Block locking
– All blocks locked at power-up
– Any combination of blocks can be locked
– WP
– Absolute Write Protection with V
Access time: 70 ns
Asynchronous Page Read
– Page Size: 4, 8 or 16 words
– Subsequent read within page: 20 ns
Low power features
– Automatic Temperature-compensated Self-
– Partial Array Self-Refresh (PASR)
– Deep Power-Down (DPD) mode
Synchronous Burst Read/Write
with zero latency
Refresh (TCR)
F
for Block Lock-Down
M36L0R7060B1
M36L0R7060T1
TFBGA88 (ZAQ)
8 x 10 mm
FBGA
PPF
www.st.com
= V
1/22
SS
1

Related parts for m36l0r7060t1

m36l0r7060t1 Summary of contents

Page 1

... CCP DDQF – for fast program PPF Electronic signature – Manufacturer Code: 20h – Top Device Code M36L0R7060T1: 88C4h – Bottom Device Code M36L0R7060B1: 88C5h Package – ECOPACK® Flash memory Synchronous / Asynchronous Read – Synchronous Burst Read mode: 54 MHz, 66 MHz – ...

Page 2

... PSRAM Configuration Register Enable (CR 2.17 V supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 DDF 2.18 V supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 CCP 2.19 V supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 DDQF 2.20 V Program supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 PPF 2.21 V ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/ M36L0R7060T1, M36L0R7060B1 ) . . . . . . . . . . . . . . . . . . . . . 11 ...

Page 3

... M36L0R7060T1, M36L0R7060B1 7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Contents 3/22 ...

Page 4

... Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2. Main operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 5. Device capacitance Table 6. Stacked TFBGA88 8 × × 10 active ball array, 0.8 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 7. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4/22 M36L0R7060T1, M36L0R7060B1 ...

Page 5

... M36L0R7060T1, M36L0R7060B1 List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. TFBGA connections (top view through package Figure 3. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 4. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 5. AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 6. TFBGA88 8 × 10 mm, 8 × 10 ball array - 0.8 mm pitch, package outline . . . . . . . . . . . . . . 18 List of figures 5/22 ...

Page 6

... Description 1 Description The M36L0R7060T1 and M36L0R7060B1 combine two memory devices in a multichip package: a 128-Mbit, Multiple Bank Flash memory, the M58LR128HT or M58LR128HB a 64-Mbit PseudoSRAM, the M69KB096AM The purpose of this document is to describe how the two memory components operate with respect to each other. It must be read in conjunction with the M58LR128HTB and M69KB096AM datasheets, where all specifications required to operate the Flash memory and PSRAM components are fully detailed ...

Page 7

... M36L0R7060T1, M36L0R7060B1 Table 1. Signal names Signal name A0-A22 Address inputs DQ0-DQ15 Common Data input/output L Latch Enable input for Flash memory and PSRAM K Burst Clock for Flash memory and PSRAM WAIT Wait Data in Burst Mode for Flash memory and PSRAM V Flash memory power supply ...

Page 8

... DQ8 DQ2 DQ10 DQ5 DQ0 DQ1 DQ3 DQ12 G F DQ9 DQ11 DQ4 CCP DDQF V DDF M36L0R7060T1, M36L0R7060B1 A21 A11 K A22 A12 A13 A20 A10 A15 A8 A14 A16 DQ13 WAIT NC DQ14 ...

Page 9

... M36L0R7060T1, M36L0R7060B1 2 Signal descriptions See Figure 1: Logic diagram connect-ed to this device. 2.1 Address inputs (A0-A22) Addresses A0-A21 are common inputs for the Flash memory and PSRAM components. The other lines (A22 input for the Flash memory component only. The Address inputs select the cells in the memory array to access during Bus Read operations ...

Page 10

... M58LR128HTB datasheet). RPH 10/ Lock-Down is enabled and the protection status of the Locked Refer to the M58LR128HTB datasheet, for the DD2 , the device is in normal operation. Exiting Reset mode the IH M36L0R7060T1, M36L0R7060B1 , and Reset is IL the Flash memory Lock-Down is disabled IH , the IL ...

Page 11

... M36L0R7060T1, M36L0R7060B1 2.11 PSRAM Chip Enable input (E The Chip Enable input activates the PSRAM when driven Low (asserted). When de- asserted (V ), the device is disabled, and goes automatically in low-power Standby mode IH or Deep Power-down mode, according to the RCR settings. 2.12 PSRAM Write Enable (W Write Enable, W ...

Page 12

... Program or Erase; a change PPF it acts as a power supply pin. In this condition V PPH decoupled with a 0.1 µF ceramic capacitor close to the pin PPF program and erase currents. PPF M36L0R7060T1, M36L0R7060B1 and V . DDF CCP ) V is seen as a control input. In this PPF DDF circuit ...

Page 13

... M36L0R7060T1, M36L0R7060B1 3 Functional description The PSRAM and Flash memory components have separate power supplies but share the same grounds. They are distinguished by two Chip Enable inputs: E and E for the PSRAM. P Recommended operating conditions do not allow more than one device to be active at a time ...

Page 14

... Any PSRAM mode is allowed Hi Hi M36L0R7060T1, M36L0R7060B1 A0- A17 W LB ,UB A19 A18 A20- A21 V V Valid Valid IL IL 00(RCR) BCR 10(BCR) RCR IL (8) Data ...

Page 15

... M36L0R7060T1, M36L0R7060B1 4 Maximum rating Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied ...

Page 16

... Input and output timing ref. voltages Figure 4. AC measurement I/O waveform 16/22 conditions. Designers should check that the Flash memory Min 1.7 – 1.7 8.5 –0.4 – DDQF 0V M36L0R7060T1, M36L0R7060B1 PSRAM Max Min Max 1.95 – – – 1.7 1.95 1.95 – – 9.5 – – V +0.4 – – DDQF 85 – ...

Page 17

... M36L0R7060T1, M36L0R7060B1 Figure 5. AC measurement load circuit Table 5. Device capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Please refer to the M58LR128HTB and M69KB096AM datasheets for further DC and AC characteristics values and illustrations DDF DDQF DEVICE UNDER TEST 0.1µ ...

Page 18

... The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK trademark. ECOPACK specifications are available at: www.st.com. Figure 6. TFBGA88 8 × 10 mm, 8 × 10 ball array - 0.8 mm pitch, package outline Drawing is not to scale. 18/ BALL "A1" FE FE1 M36L0R7060T1, M36L0R7060B1 e b ddd A2 A1 BGA-Z42 ...

Page 19

... M36L0R7060T1, M36L0R7060B1 Table 6. Stacked TFBGA88 8 × × 10 active ball array, 0.8 mm pitch, package mechanical data Symbol Typ 0.850 b 0.350 D 8.000 D1 5.600 ddd E 10.000 E1 7.200 E2 8.800 e 0.800 FD 1.200 FE 1.400 FE1 0.600 SD 0.400 SE 0.400 millimeters Min Max 1.200 0.200 0.0335 0.300 0.400 ...

Page 20

... Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. 20/22 M36 ZAQ E = 1.7 to 1.95V DDQF M36L0R7060T1, M36L0R7060B1 ...

Page 21

... M36L0R7060T1, M36L0R7060B1 8 Revision history Table 8. Document revision history Date 23-May-2006 31-Aug-2006 07-May-2007 Revision 0.1 First release. PSRAM changed to M69KM096AM. Blank and T removed below 0.2 Option in Table 7: Ordering information Document status promoted from Target Specification to full Datasheet speed class and 66 MHz frequency added. ...

Page 22

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 22/22 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M36L0R7060T1, M36L0R7060B1 ...

Related keywords