m36l0r8060t0 STMicroelectronics, m36l0r8060t0 Datasheet - Page 9
m36l0r8060t0
Manufacturer Part Number
m36l0r8060t0
Description
256 Mbit Multiple Bank, Multi-level, Burst Flash Memory 64 Mbit Burst Psram, 1.8v Supply, Multi-chip Package
Manufacturer
STMicroelectronics
Datasheet
1.M36L0R8060T0.pdf
(18 pages)
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Table 2. Main Operating Modes
Note: 1. X = Don't care.
Flash Read
Flash Write
Flash Address
Latch
Flash Output
Disable
Flash Standby
Flash Reset
PSRAM Read
PSRAM Write
PSRAM Write
Configuration
Register
PSRAM
Standby
PSRAM Deep
Power-Down
Operation
2. L
3. Depends on G
4. WAIT signal polarity is configured using the Set Configuration Register command. See the M30L0R8000T0 datasheet for details.
F
can be tied to V
V
V
V
V
V
E
X
F
IH
IL
IL
IL
IL
F
.
The Flash memory must be disabled
IH
G
V
V
V
if the valid address has been previously latched.
Any Flash mode is allowed.
X
X
X
IH
IH
IL
F
W
V
V
V
V
X
X
IH
IH
IH
IL
F
V
V
V
L
IL
IL
X
X
X
IL
F
(2)
(2)
RP
V
V
V
V
V
V
IH
IH
IH
IH
IH
IL
F
WAIT
Hi-Z
Hi-Z
F
(4)
V
V
V
V
V
E
IH
IH
IL
IL
IL
P
Any PSRAM mode is allowed.
PSRAM must be disabled.
CR
V
V
V
V
X
IH
IL
IL
IL
P
M36L0R8060T0, M36L0R8060B0
V
G
V
X
X
X
IH
IL
P
W
V
V
V
X
X
IH
IL
IL
P
LB
P
V
V
X
X
X
,UB
IL
IL
P
PSRAM data in
PSRAM data in
Flash Data Out
Flash Data Out
Flash Data In
PSRAM data
DQ15-DQ0
or Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
out
(3)
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