cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 45

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cn8223

Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet

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CN8223
ATM Transmitter/Receiver with UTOPIA Interface
Figure 2-10. E3 Interface Transmit Timing
2.2.4 Externally Framed Receive Line Interface
100046D
TXDATO
TXCKI
TXSYI
X
X
X
frequency of 34.368 MHz. TXSYI has a rising edge after the sampling of the last
bit of the frame alignment signal. TXDATO is the output signal; it transitions in
response to the falling edge of TXCKI, and can be sampled on the following
falling edge. This timing is compatible with the Conexant Bt8330B DS3/E3
framer using the TXOVH output. The frame alignment signal position is filled
with the value 0xCCCC. This value provides the four overhead bits (required by
ETSI prETS 300 214) that follow the frame alignment signal defined by ITU
G.751.
The CN8223 external receive line interface has three inputs: clock, data, and
frame sync. Frame sync can be a multiple of the frame period.
receiver connections for all external framing modes. The receive line inputs
consist of the receive clock (RXCKI), the receive sync input (RXSYI), and the
receive data input (RXDATI) when the external framer mode is selected.
Table 2-7. External Framing Mode Receiver Connections
X
Frame Alignment Signal Position
Receive Clock Input (RXCKI)
Receive Sync Input (RXSYI)
Receive Data Input (RXDATI)
Receive Loss of Signal (RXLOS~)
Figure 2-10
X
X
Signal Name
illustrates the transmit timing for the E3 interface. TXCKI has a
X
Conexant
X
X
X
1
1
RXCKI
RXIN[3]
RXIN[0]
RXIN[4]
0
0
Connect to CN8223 Pin
2.0 Functional Description
Information Field
Table 2-7
2.2 Line Framers
lists the
2-11

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