SST49LF020A-33-4C-NHE SST [Silicon Storage Technology, Inc], SST49LF020A-33-4C-NHE Datasheet - Page 21

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SST49LF020A-33-4C-NHE

Manufacturer Part Number
SST49LF020A-33-4C-NHE
Description
2 Mbit LPC Flash
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet

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2 Mbit LPC Flash
SST49LF020A
©2006 Silicon Storage Technology, Inc.
LFRAME#
LFRAME#
LFRAME#
LFRAME#
LAD[3:0]
LAD[3:0]
LAD[3:0]
LAD[3:0]
FIGURE 7: Program Command Sequence (LPC Mode)
LCLK
LCLK
LCLK
LCLK
CE#
CE#
CE#
CE#
Note: 1. Address must be within memory address range specified in Table 4.
2nd Start
3rd Start
1 Clock 1 Clock
4th Start
0000b
0000b
1st Start
1 Clock 1 Clock
0000b
0000b
1 Clock 1 Clock
1 Clock 1 Clock
Memory
011Xb
011Xb
Cycle
Memory
Memory
Write
011Xb
011Xb
Cycle
Cycle
Write
Write
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
Write the 4th command (target locations to be programmed) to the device in LPC mode.
Load Address "YYYY 2AAAH" in 8 Clocks
Load Address "YYYY 5555H" in 8 Clocks
Load Address "YYYY 5555H" in 8 Clocks
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
Load Ain in 8 Clocks
Write the 2nd command to the device in LPC mode.
Write the 3rd command to the device in LPC mode.
Address 1
Address 1
Write the 1st command to the device in LPC mode.
Address 1
Address 1
A[15:12]
0010b
0101b
0101b
21
1010b
0101b
A[11:8]
0101b
1010b
0101b
A[7:4]
0101b
1010b
0101b
A[3:0]
0101b
Load Data "A0H" in 2 Clocks
Load Data "55H" in 2 Clocks
Load Data "AAH" in 2 Clocks
Load Data in 2 Clocks
0101b
0000b
D[3:0]
1010b
Data
Data
Data
Data
0101b
1010b
D[7:4]
1010b
1111b
1111b
1111b
1111b
2 Clocks
2 Clocks
TAR
TAR
2 Clocks
2 Clocks
TAR
TAR
Tri-State
Tri-State
Tri-State
Tri-State
1 Clock
1 Clock
1 Clock
0000b
0000b
0000b
0000b
Sync
Sync
Sync
Sync
1 Clock
S71206-08-000
TAR
TAR
TAR
TAR
Data Sheet
program start
program start
Command
Start next
Command
Start next
1206 F08.0
1 Clock
1 Clock
Command
Internal
Start next
Internal
1 Clock
5/06

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