SST49LF020A-33-4C-NHE SST [Silicon Storage Technology, Inc], SST49LF020A-33-4C-NHE Datasheet - Page 30

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SST49LF020A-33-4C-NHE

Manufacturer Part Number
SST49LF020A-33-4C-NHE
Description
2 Mbit LPC Flash
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet

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Data Sheet
TABLE 17: Reset Timing Parameters, V
TABLE 18: Read/Write Cycle Timing Parameters, V
©2006 Silicon Storage Technology, Inc.
Symbol
T
T
T
T
T
T
Symbol
T
T
T
T
T
T
T
T
T
PRST
KRST
RSTP
RSTF
RST
RSTE
CYC
SU
DH
VAL
BP
SE
BE
ON
OFF
FIGURE 14: Reset Timing Diagram (LPC Mode)
1. There may be additional latency due toT
1. Minimum and maximum times have different loads. See PCI spec.
1
1
RST#/INIT#
LFRAME#
LAD[3:0]
V
CLK
DD
Parameter
V
Clock Stable to Reset Low
RST# Pulse Width
RST# Low to Output Float
RST# High to LFRAME# Low
RST# Low to reset during Sector-/Block-Erase or Program
Parameter
Clock Cycle Time
Data Set Up Time to Clock Rising
Clock Rising to Data Hold Time
Clock Rising to Data Valid
Byte Programming Time
Sector-Erase Time
Block-Erase Time
Clock Rising to Active (Float to Active Delay)
Clock Rising to Inactive (Active to Float Delay)
DD
stable to Reset Low
RSTE
T
PRST
if a reset procedure is performed during a Program or Erase operation.
DD
T
KRST
=3.0-3.6V (LPC Mode)
DD
30
=3.0-3.6V (LPC Mode)
T
RSTF
T
RSTP
T
RSTE
Min
Min
100
100
30
1
1
7
0
2
2
T
RST
2 Mbit LPC Flash
Max
Max
or Program operation
48
10
20
25
25
28
11
Sector-/Block-Erase
SST49LF020A
aborted
S71206-08-000
1206 F15.0
Units
Units
ms
ms
ms
ns
µs
ns
µs
ns
ns
µs
µs
ns
ns
ns
ns
T17.0 1206
T18.0 1206
5/06

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