bt8375kpf Conexant Systems, Inc., bt8375kpf Datasheet - Page 146

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bt8375kpf

Manufacturer Part Number
bt8375kpf
Description
Single Chip Transceivers For T1/e1 And Integrated Service Digital Network Isdn Primary Rate Interfaces Systems
Manufacturer
Conexant Systems, Inc.
Datasheet

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3.0 Registers
3.6 Primary Control and Status Registers
ALOOP
DL3_TS works in conjunction with the DL3_BIT register [addr 016] to determine which transmit time slots are
supplied from the TDLI pin, and which receive and transmit time slots are accompanied by a gated RDLCKO
and TDLCKO output. (Refer to
Link Waveforms). RDLO outputs the entire receive data bit stream, and only selective digits are marked by
RDLCKO.
DL3EN
FS[1:0]
3-28
015— External Data Link Time Slot (DL3_TS)
DL3EN
7
Enable Local Analog Loopback—Bipolar data from XTIP/XRING is internally connected to
RTIP/RRING inputs. Externally applied data on RTIP/RRING inputs is ignored.
XTIP/XRING output data is unaffected. After ALOOP activation or deactivation, the
processor must reset the receive line interface [RST_LIU; addr 020]. If RCKO is selected as
the TCKI clock source [CMUX; addr 01A], an alternate transmit clock source must be
provided when this loopback is activated. Possible configurations include selecting the TCKI
pin or CLADO as the transmit clock source, or programming the JAT in the transmit direction
and setting JFREE to enable the free-running 10 MHz reference [JAT_CR register; addr 002].
Enable External Data Link—Active-high enables data insertion from TDLI and enables clock
gating on TDLCKO and RDLCKO outputs according to the selected external data link mode.
NOTE:
External Data Link Frame Select—The External data link can be programmed to source and
sink data bits during all frames, odd frames, or even frames. FS[1:0] controls gating of
RDLCKO and TDLCKO external data link clocks.
FS[1]
6
PIO [addr 018] must select TDL_IO and/or RDL_IO to enable external data link
signals. Bits 5 and 6 must be written to 1s for the External Data Link to operate
correctly.
Figure 2-29, Transmit External Data Link
FS[1:0]
FS[1:0]
FS[0]
5
00
01
10
00
01
10
11
11
0 = no loopback
1 = analog loopback
0 = external data link pins inactive
1 = TDLI/TDLCKO and RDLO/RDLCKO active
None. Equivalent to disabling external data link.
Odd frames only: Frames 1, 3, 5, etc.
Even frames only: Frames 2, 4, 6, etc.
All frames.
None. Equivalent to disabling external data link.
Even frames only: Frames 0, 2, 4, 6, etc.
Odd frames only: Frames 1, 3, 5, etc.
All frames.
TS[4]
4
Conexant
Frame Select (T1 Mode)
Frame Select (E1 Mode)
TS[3]
3
Fully Integrated T1/E1 Framer and Line Interface
TS[2]
Waveforms, Transmit External Data
2
TS[1]
Bt8370/8375/8376
1
N8370DSE
TS[0]
0

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