ST16C2550CQ48 EXAR [Exar Corporation], ST16C2550CQ48 Datasheet - Page 38

• Manufacturer Part Number: ST16C2550CQ48
• Description: 2.97V TO 5.5V DUART WITH 16-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

ST16C2550
REV. 4.4.0
GENERAL DESCRIPTION .................................................................................................1
PIN DESCRIPTIONS .........................................................................................................4
1.0 PRODUCT DESCRIPTION .....................................................................................................................7
2.0 FUNCTIONAL DESCRIPTIONS .............................................................................................................8
3.0 UART INTERNAL REGISTERS ...........................................................................................................16
4.0 INTERNAL REGISTER DESCRIPTIONS .............................................................................................17
A
F
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE .............................................................................................................................................. 8
2.2 DEVICE RESET ................................................................................................................................................ 8
2.3 CHANNEL A AND B SELECTION .................................................................................................................... 8
2.4 CHANNEL A AND B INTERNAL REGISTERS ................................................................................................ 9
2.5 DMA MODE ....................................................................................................................................................... 9
2.6 INTA AND INTB OUTPUTS .............................................................................................................................. 9
2.7 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT ........................................................................... 10
2.8 PROGRAMMABLE BAUD RATE GENERATOR ........................................................................................... 10
2.9 TRANSMITTER ............................................................................................................................................... 12
2.10 RECEIVER .................................................................................................................................................... 13
2.11 INTERNAL LOOPBACK ............................................................................................................................... 15
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 17
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 17
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE .............................................................................. 17
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY ............................................................................... 19
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY ...................................................................................... 20
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE ...................................................................................... 20
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE 22
4.8 LINE STATUS REGISTER (LSR) - READ ONLY ........................................................................................... 23
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY .................................................................................... 24
4.10 SCRATCH PAD REGISTER (SPR) - READ/WRITE .................................................................................... 25
F
F
F
T
T
T
T
F
F
F
T
F
F
F
F
F
T
T
T
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
2.9.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ......................................................................................... 12
2.9.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................. 12
2.9.3 TRANSMITTER OPERATION IN FIFO MODE ........................................................................................................... 13
2.10.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .......................................................................................... 14
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................. 18
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION ................................................................ 18
4.4.1 INTERRUPT GENERATION: ...................................................................................................................................... 19
4.4.2 INTERRUPT CLEARING: ........................................................................................................................................... 19
1: C
2: TXRDY#
3: INTA
4: INTA
5: T
6:
7:
8: I
9: R
10: P
1. ST16C2550 B
2. P
3.
4. T
5. E
6. O
7. T
8. T
9. R
10. R
11. I
.....................................................................................................................................................1
NTERRUPT
YPICAL DATA RATES WITH A
UART CHANNEL A AND B UART INTERNAL REGISTERS...................................................................................... 16
INTERNAL REGISTERS DESCRIPTION ................................................................................................................... 17
HANNEL
ECEIVE
ST16C2550 D
YPICAL OSCILLATOR CONNECTIONS
RANSMITTER
RANSMITTER
IN
XTERNAL
ECEIVER
PERATING
ARITY SELECTION
NTERNAL
................................................................................................................................................1
ECEIVER
O
AND
AND
UT
FIFO T
A
AND
A
INTB P
INTB P
S
O
SSIGNMENT
C
AND
L
O
OURCE AND
F
PERATION IN NON
LOCK
OOP
RXRDY# O
REQUENCY VERSUS
PERATION IN
O
O
.................................................................................................................................3
LOCK
RIGGER
B S
PERATION IN NON
PERATION IN
ATA
INS
IN
B
C
ACK IN
........................................................................................................................................................ 22
ELECT
O
ONNECTION FOR
D
B
O
PERATION
US
IAGRAM
..................................................................................................................................................... 2
PERATION FOR
L
P
EVEL
I
UTPUTS IN
RIORITY
NTERCONNECTIONS
............................................................................................................................................... 8
C
FIFO M
14.7456 MH
HANNEL
FIFO M
-FIFO M
......................................................................................................................................... 1
S
TABLE OF CONTENTS
F
ELECTION
OR
P
-FIFO M
L
ODE
OWER
EVEL
............................................................................................................................... 10
FIFO
A
R
E
ODE
T
XTENDED
ODE
ECEIVER
AND
.......................................................................................................................... 14
RANSMITTER
Z CRYSTAL OR EXTERNAL CLOCK
....................................................................................................................... 19
...................................................................................................................... 13
S
ODE
..................................................................................................................... 20
AND
.................................................................................................................... 14
UPPLY
B ................................................................................................................ 15
.................................................................................................................. 8
.............................................................................................................. 13
DMA M
............................................................................................................... 9
D
ATA
C
HART
........................................................................................................ 9
I
R
ODE
ATE
. ............................................................................................. 11
............................................................................................. 9
.......................................................................................... 11
2.9V TO 5.5V DUART WITH 16-BYTE FIFO
...................................................................... 12
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