W83194R-58A Winbond, W83194R-58A Datasheet

W83194R-58A

Manufacturer Part Number

W83194R-58A

Description

100MHZ AGP CLOCK FOR VIA CHIPSET

Manufacturer

Winbond

Datasheet

1.W83194R-58A.pdf (13 pages)

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1.0 GENERAL DESCRIPTION

The W83194R-58A is a Clock Synthesizer for VIA chipset.

required for high-speed RISC or CISC microprocessor such as Intel PentiumII and also provides 16

different frequencies of CPU clocks by software setting.

selectable with smooth transitions. The W83194R-58A provides AGP clocks especially for clone

chipset, and makes SDRAM in synchronous frequency with CPU or AGP clocks.

The W83194R-58A provides I

each clock outputs and choose the 0.25%, 0.5% or 0.5%,1.5% center type spread spectrum to reduce

EMI.

The W83194R-58A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.

High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30

pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads when

maintaining 50± 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide

better than 0.5V /ns slew rate.

2.0 PRODUCT FEATURES

(mode as Tri-state or Normal )

Supports Pentium , Pentium

4 CPU clocks

12 SDRAM clocks for 3 DIMs

Two AGP clocks

6 PCI synchronous clocks.

Optional single or mixed supply:

(Vdd = Vddq3 = Vddq2 = Vddq2b = 3.3V) or (Vdd = Vddq3 = Vddq2 = 3.3V, Vdq2b = 2.5V)

Programmable registers to enable/stop each output and select modes

MODE pin for power Management

48 MHz for USB

24 MHz for super I/O

48-pin SSOP package

Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns, AGP to CPU sync. skew 0 ns (250 ps)

SDRAM frequency synchronous to CPU or AGP clocks

Smooth frequency switch with selections from 60 to 100 MHz CPU(-37) and 66 to 150MHz(-58)

0~0.5% down type and 0.25%, 0.5% center type spread spectrum to reduce EMI

C 2-Wire serial interface and I

C serial bus interface to program the registers to enable or disable

Pro, Pentium

C read back

- 1 -

100MHZ AGP CLOCK FOR VIA CHIPSET

II, AMD and Cyrix CPUs with I

AGP and PCI clocks are externally

W83194R-58A provides all clocks

Publication Release Date: Nov. 1999

W83194R-58A

Revision 0.30

Related parts for W83194R-58A

W83194R-58A Summary of contents

Page 1

... EMI. The W83194R-58A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30 pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads when maintaining 50± ...

Page 2

... PIN CONFIGURATION PLL2 ¡Ò XTAL OSC STOP PLL1 STOP Spread Spectrum CPU_STOP# LATCH ~ 5 PCI STOP clock POR Divder Control Logic PCI_STOP# Config. Reg W83194R-58A PRELIMINARY 48MHz 24MHz REF(0 AGP(0:1) 2 CPUCLK(0:3) 4 SDRAM(0:11 PCICLK(0:4) 5 PCICLK_F Publication Release Date: Nov. 1999 Revision 0.30 ...

Page 3

... Crystal input with internal loading capacitors and feedback resistors. OUT Crystal output at 14.318MHz nominally. I/O FUNCTION OUT Low skew (< 250ps) clock outputs for host frequencies such as CPU, Chipset and Cache. Vddq2b is the supply voltage for these outputs. Publication Release Date: Nov. 1999 - 3 - W83194R-58A PRELIMINARY Revision 0.30 ...

Page 4

... SDRAM clock outputs which have the same frequency as CPU clocks. I/O Latched input for FS1 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. Free running PCI clock during normal operation. Publication Release Date: Nov. 1999 - 4 - W83194R-58A PRELIMINARY Revision 0.30 ...

Page 5

... Latched input for MODE at initial power up. 24MHz output for super I/O during normal operation. I/O Internal 250k pull-up. Latched input for FS0 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. 48MHz output for USB during normal operation. Publication Release Date: Nov. 1999 - 5 - W83194R-58A PRELIMINARY Revision 0.30 ...

Page 6

... Power supply for CPUCLK[0:3], either 2.5V or 3.3V. Power supply for SDRAM, PCICLK and 48/24MHz outputs. Circuit Ground. SDRAM (MHz) PCI (MHz) SD_SEL=1 SD_SEL=0 112 74.7 66.8 66.8 97.0 64. 133.3 88.7 83.3 66.6 95.25 63.5 100.2 66 W83194R-58A PRELIMINARY FUNCTION AGP (MHz) REF (MHz) 37.3 74.7 14.318 33.4 66.8 14.318 32.33 64.67 14.318 37.5 75 14.318 44.3 88.7 14.318 33.3 66.6 14.318 31.75 63.5 14.318 33.4 66.8 14.318 CPU Operate at VDD = 2 ...

Page 7

... SSEL0 ( Frequency table selection by software via Selection by hardware Selection by software Bit 6:4 SSEL3 (Frequency table selection by software via I W83194R-58 Normal 1 = Spread Spectrum enabled 0 = Running 1 = Tristate all outputs Publication Release Date: Nov. 1999 - 7 - W83194R-58A PRELIMINARY for Revision 0.30 ...

Page 8

... Outputs PCI SDRAM Hi-Z Hi-Z see table CPU - 8 - W83194R-58A PRELIMINARY 2 C (MHz) PCI AGP (MHz) (MHz) SD_SEL=0 74.7 37.3 74.7 66.8 33.4 66.8 64.67 32.33 64.67 75 37.5 75 88.7 44..3 88.7 66.6 33.3 66.6 63.5 31.75 63.5 66.8 33.4 66.8 68.7 34.3 68.7 74.7 37.3 74.7 76.6 38.3 76 ...

Page 9

... CPUCLK3 (Active / Inactive) CPUCLK2 (Active / Inactive) CPUCLK1 (Active / Inactive) CPUCLK0 (Active / Inactive) Description Reserved PCICLK_F (Active / Inactive) AGP0 (Active / Inactive) PCICLK4 (Active / Inactive) PCICLK3 (Active / Inactive) PCICLK2 (Active / Inactive) PCICLk1 (Active / Inactive) PCICLK0 (Active / Inactive W83194R-58A PRELIMINARY Publication Release Date: Nov. 1999 Revision 0.30 ...

Page 10

... SDRAM0 (Active / Inactive) Description Reserved Reserved Reserved Reserved SDRAM11 (Active / Inactive) SDRAM10 (Active / Inactive) SDRAM9 (Active / Inactive) SDRAM8 (Active / Inactive) Description Reserved Reserved Reserved AGP1 (Active / Inactive) Reserved Reserved REF1 (Active / Inactive) REF0 (Active / Inactive W83194R-58A PRELIMINARY Publication Release Date: Nov. 1999 Revision 0.30 ...

Page 11

... W83194R-58A 10.0 HOW TO READ THE TOP MARKING W83194R-58A 28051234 814GBB 1st line: Winbond logo and the type number: W83194R-58A 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 814 814: packages made in '98, week 14 G: assembly house ID ...

Page 12

... Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II 123 Hoi Bun Rd., Kwun Tong Kowloon, Hong Kong TEL: 852-27516023-7 FAX: 852-27552064 Publication Release Date: Nov. 1999 - 12 - W83194R-58A PRELIMINARY Winbond Electronics (North America) Corp. 2730 Orchard Parkway San Jose, CA 95134 U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 ...

Page 13

... W83194R-58A Publication Release Date: Nov. 1999 - 13 - PRELIMINARY Revision 0.30 ...

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