SL34118N SLS [System Logic Semiconductor], SL34118N Datasheet - Page 5

• Manufacturer Part Number: SL34118N
• Description: Voice Switched Speakerphone Circuit
• Manufacturer: SLS [System Logic Semiconductor]

ATTENUATOR CONTROL BLOCK
inputs described above:
the two attenuators. The effect of C1-C4 is as follows:
X = Don’t Care; Y = C3 and C4 are not both 0
transmit level detectors sense higher signal levels
- Tthe output of the comparator operated by RLO2
- The output of the comparator operated by RLO1
- The output of the transmit background noise
- The output of the receive background noise
- The volume control.
- The dial tone detector.
- The AGC circuit.
1) “Transmit” means the transmit attenuator is
2) “Receive”
3)
4) “Slow Idle” means speech has ceassed in both
5) Switching to the full transmit or receive modes
1) The circuit will switch to transmit if: a) both
SLS
C1
Tx
Tx
Rx
Rx
Tx
Tx
Rx
Rx
The Attenuator Control Block has the seven
and TLO2 (microphone/speaker side) - designated
C1.
and TLO1 (Tip/Ring) side) - designated C2.
monitor - designated C3.
monitor - designated C4.
The single output of the Control Block controls
A definition of the above terms:
A summary of the truth table is as follows:
fully on (+6.0 dB), and the receive attenuator is
at max. attenuation (-46 dB).
controlled by the volume control. At max.
volume, the receive attenuator is fully on
(6.0 dB), and the transmit attenuator is at max.
attenuation (-46 dB).
speech are present in approximately equal levels.
The attenuators are quickly switched (30 ms) to
idle until one speech level dominates the other.
transmit and receive path. The attenuators are
then slowly switched (1 second) to the idle
mode.
from any other mode is at the fast rate (30 ms).
“Fast Idle” means both transmit and receive
System Logic
Semiconductor
C2
Tx
Rx
Tx
Rx
Tx
Rx
Tx
Rx
Inputs
means
C3
Y
Y
X
X
1
0
0
0
both
C4
X
X
Y
Y
1
0
0
0
attenuators
Slow Idle
Slow Idle
Slow Idle
Slow Idle
Transmit
Fast Idle
Fast Idle
Receive
Output
Mode
are
relative to the respective receive level detectors (TLI1
versus RLI1, TLI2 versus RLI2), and b) the transmit
background noise monitor indicates the presence of
speech.
receive level detectors sense higher signal levels
relative to the respective transmit level detectors, and
b) the receive background noise monitor indicates the
presence of speech.
level detectors disagree on the relative strengths of
the signal levels, and at least one of the background
noise monitors indicates speech. For example,
refferring to the Expanded Logic Diagram (Figure 8), if
there is sufficient signal at the microphone amp
output (TLI2) to override the speaker signal (RLI2),
and there is sufficient signal at the receive input
(RLI1) to override the signal at the hybrid output
(TLI1), and either or both background monitors
indicate speech, then the circuit will be in the fast idle
mode. Two conditions which can cause the fast idle
mode to occur are a) when both talkers are attempting
to gain control of the system by talking at the same
time, and b) when one talker is in a very noisy
environment, forcing the other talker to continually
override that noise level. In general, the fast idle mode
will occur infrequently.
when a) both talkers are quiet (no speech present), or
b) when one talker’s speech level is continuously
overriden by noise at the other speaker’s location.
transmit, receive, fast idle and slow idle is determined
in part by the components at the C
schematic of the C
operates as follows:
2) The circuit will switch to receive if: a) both
3) The circuit will switch to the fast idle mode if the
4) The circuit will switch to the slow idle mode
- R
- To switch to the receive mode, I
- To switch to the transmit mode, I
- To switch to idle quickly (fast idle), the current
- To switch to idle slowly (slow idle), the current
The time required to switch the circuit between
off), charging the external capacitor to +240 mV
above V
charging of the capacitor.)
is off) bringing down the voltage on the capacitor
to -240 mV with respect to V
sources are turned off, and the internal 2.0 k
resistor is switched in, discharging the capacitor
to V
sources are turned off, the switch at the 2.0 k
resistor is open, and the capacitor discharges to
V
constant = R
T
B
is typically 120 k , and C
through the external resistor R
B
with a time constant = 2.0 K x C
B
. (An internal clamp prevents further
T
x C
T
circuitry is shown in Figure 4 and
T
.
T
B
.
typically 5.0 F.
1
is turned on (I
T
2
SL34118
is turned on (I
pin (Pin 14). A
T
with a time
T
.
2
is
1