CAT25320 CATALYST [Catalyst Semiconductor], CAT25320 Datasheet - Page 7

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CAT25320

Manufacturer Part Number
CAT25320
Description
32-Kb SPI Serial CMOS EEPROM
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet

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Byte Write
Once the WEL bit is set, the user may execute a write
sequence, by sending a WRITE instruction, a 16-bit
address and data as shown in Figure 4. Only 12
significant address bits are used by the CAT25320.
The rest are don’t care bits, as shown in Table 5.
Internal programming will start after the low to high CS
transition.
commands, except for RDSR (Read Status Register)
will be ignored. The RDY
write cycle is in progress (RDY
device is ready to accept commands (RDY
Table 5. Byte Address
Figure 4. Byte WRITE Timing
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 5. Page WRITE Timing
Note: Dashed Line = mode (1, 1) - - - - - -
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Device
CAT25320
SCK
SCK
SO
CS
SI
SO
CS
SI
* Please check the Byte Address Table (Table 5)
During
*Please check the Byte Address Table. (Table 5)
0
0
0
0
¯¯¯¯ bit will indicate if the internal
0
an
0
1
1
0
0
2
HIGH IMPEDANCE
Address Significant Bits
internal
2
0
0
¯¯¯¯ high), or the the
3
OPCODE
3
OPCODE
0
0
4
4
A11 - A0
0
write
0
5
¯¯¯¯ low).
5
1
1
6
6
cycle,
0
0
7
7
A N
A
8
N
8
BYTE ADDRESS*
BYTE ADDRESS*
HIGH IMPEDANCE
¯¯
all
7
21
Address Don't Care Bits
21
Page Write
After sending the first data byte to the CAT25320, the
host may continue sending data, up to a total of 32
bytes, according to timing shown in Figure 5. After
each data byte, the lower order address bits are
automatically incremented, while the higher order
address bits (page address) remain unchanged. If
during this process the end of page is exceeded, then
loading will “roll over” to the first byte in the page, thus
possibly overwriting previoualy loaded data. Following
completion of the write cycle, the CAT25320 is
automatically returned to the write disable state.
22
22
A 0
A
23
A15 - A12
23 24-31 32-39
0
D7 D6 D5 D4 D3 D2 D1 D0
Data
Byte 1
24
25
Data
Byte 2
DATA IN
26
Data
Byte 3
24+(N-1)x8-1..24+(N-1)x8 24+Nx8-1
DATA IN
27
28
# Address Clock Pulses
7..1
29
Data Byte N
30
0
31
16
CAT25320
Doc. No. 1111 Rev. E

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