CAT25320 CATALYST [Catalyst Semiconductor], CAT25320 Datasheet - Page 8

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CAT25320

Manufacturer Part Number
CAT25320
Description
32-Kb SPI Serial CMOS EEPROM
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet

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CAT25320
Write Status Register
The Status Register is written by sending a WRSR
instruction according to timing shown in Figure 6. Only
bits 2, 3 and 7 can be written using the WRSR
command.
Figure 6. WRSR Timing
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 7. WP
Note: Dashed Line = mode (1, 1) - - - - - -
Doc. No. 1111 Rev. E
SCK
CS
SCK
SO
SI
CS
WP
WP
¯¯¯ Timing
0
0
0
1
HIGH IMPEDANCE
0
2
0
3
OPCODE
0
4
0
5
0
6
8
1
7
t WP S
Write Protection
The Write Protect (WP
Block Protect bits BP0 and BP1 against being
inadvertently altered. When WP
bit is set to “1”, write operations to the Status Register
are inhibited. WP
interrupt a write to the status register. If the internal
write cycle has already been initiated, WP
will have no effect on any write operation to the Status
Register. The WP
WPEN bit is set to “0”. The WP
in Figure 7.
MSB
7
8
t WPH
9
6
10
¯¯¯ going low while CS
5
¯¯¯ pin function is blocked when the
¯¯¯ ) pin can be used to protect the
11
4
DATA IN
12
3
Characteristics subject to change without notice
¯¯¯ is low and the WPEN
¯¯¯ input timing is shown
13
2
© 2007 Catalyst Semiconductor, Inc.
14
¯¯ is still low will
1
¯¯¯ going low
15
0

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