ISL59911IRZ INTERSIL [Intersil Corporation], ISL59911IRZ Datasheet - Page 10

• Manufacturer Part Number: ISL59911IRZ
• Description: 250MHz Triple Differential Receiver/ Equalizer with I2C Interface
• Manufacturer: INTERSIL [Intersil Corporation]

Applications Information
ISL59911 Overview
Differential video signals sent over long distances of twisted pair
wire encounter are increasingly attenuated as frequency and
distance increase, resulting in loss of high frequency detail
(blurring). The exact loss characteristic is a function of the wire
gauge, whether the pairs are shielded or unshielded, the
dielectric of the insulation, and the length of the wire. The loss
mechanism is primarily skin effect.
The signal can be restored by applying a filter with the inverse
transfer function of the cable to the far end signal. The ISL59911
is designed to compensate for losses due to long cables, and
incorporates the functionality and flexibility to match a wide
variety of loss characteristics.
Power Supply Sequencing
Power to the ISL59911’s negative supply pins should be applied
before the positive supply ramps. As shown in Figure 11,
V- should reach -3V before V+ reaches 1V.
If this power supply sequence cannot be guaranteed, then the
ADDR1 pin must be held low during power-up until V- has crossed
-3V.
If this power supply sequencing requirement is not met and if
ADDR1 is high, there is a small chance that the ISL59911 factory
trim will become permanently corrupted.
Power Supply Bypassing
For best performance, all ICs need bypass capacitors across
some or all of their power supply pins. The best high-frequency
decoupling is achieved with a 0.1
power supply pin and GND. Adjacent supply pins (pins 2 and 3,
19 and 20, 22 and 23, and 25 and 26) can share the same
decoupling capacitor. Keep the path to both pins as short as
possible to minimize inductance and resistance. Pins 3 and 10
provide power to the internal equalizer, while supply pins
between pin 17 and pin 25 provide power to the analog output
buffers. For best performance, the equalizer supplies should be
somewhat isolated from the buffer supplies. A separate path
back to the power source should be adequate.
A 10μF capacitor on each of the V+ and V- supplies provides
sufficient low-frequency decoupling. The 10μF capacitors do not
need to be particularly close to the ISL59911 to be effective, but
should still have a low-impedance path to the supply rails.
In many mixed-signal ICs, separation of the analog and digital
supplies and grounds is critical to prevent digital noise from
appearing on the analog signals. Because the digital logic in the
ISL59911 is only active during a one-time configuration, the
analog and digital supply pins (and grounds) can be connected
together, simplifying PCB layout and routing.
FIGURE 11. POWER SUPPLY SEQUENCING
V+
V-
-3V
+1V
10
μ
t > 0ms
F capacitor between each
ISL59911
Input Termination
The differential input signal from a Cat x cable should have a
characteristic impedance of 100Ω and is therefore terminated by
the two 50Ω resistors across the differential inputs, as shown in
Figure 1 on page 1. The 50Ω resistor and 0.1µF capacitor
connected to the midpoint keep the AC impedance low at high
frequencies, providing common-mode AC termination while
allowing the low-frequency component of the common mode
(containing the embedded H and V sync signals) to move freely.
The 1k resistor provides a higher-impedance DC path to ground,
so the common mode voltage is set to 0V when no cable is
connected.
Device Initialization
To ensure that the ISL59911 functions properly, the following
steps must be taken after initial power-up:
Communicating with the ISL59911
The ISL59911 is controlled through the industry standard I
serial interface. Adjustments to the frequency response over five
distinct frequency bands, gain and offset fine-tuning, and several
other functions are made through this interface as described in
the Register Listing starting on page 8. This level of control
enables much more accurate and flexible response matching
than previous solutions.
The ISL59911 also has an external Chip Enable (ENABLE) pin,
allowing hardware control of whether the chip is operating or in a
low-power standby mode.
Programming the ISL59911 for a Specific
Cable and Length
Determining the optimum settings for the ISL59911’s multiple
equalizer frequencies, gain, and low pass filter can initially seem
quite challenging. To equalize any cable type of any length,
transmit a step (a pure white screen works well, since the video
in H
200kHz and working up to 100MHz, so that the response at the
receive end is as flat as possible. Once the response is flat, the
gain should be adjusted as necessary to compensate for the DC
losses.
This technique is not usually practical in the field, where the best
solution is a lookup table for each cable type. Table 1 shows the
best values for a typical Cat 5 cable.
1. Ensure that the ENABLE pin is high.
2. Through the serial interface, write 0x06 to register 0x13, then
3. Perform an offset calibration by setting bit 0 of register 0x0C
SYNC
write 0x00 to the same register. This ensures that the DC gain
of the device is accurate.
to 1. The bit is automatically resets to 0 upon completion of
calibration. If offset calibration is not performed, the
ISL59911 may have large DC offsets.
region is black) and adjust the filters, starting at
September 2, 2011
FN7548.0
2
C