93LC46-ISL MICROCHIP [Microchip Technology], 93LC46-ISL Datasheet - Page 7

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93LC46-ISL

Manufacturer Part Number
93LC46-ISL
Description
1K/2K/4K 2.0V Microwire Serial EEPROM
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
3.6
The 93LC46/56/66 powers up in the ERASE/WRITE
Disable (EWDS) state. All programming modes must
be preceded by an ERASE/WRITE Enable (EWEN)
instruction. Once the EWEN instruction is executed,
programming remains enabled until an EWDS instruc-
tion is executed or V
protect against accidental data disturb, the EWDS
instruction can be used to disable all ERASE/WRITE
functions and should follow all programming opera-
tions. Execution of a READ instruction is independent
of both the EWDS and EWEN instructions.
FIGURE 3-4:
FIGURE 3-5:
FIGURE 3-6:
CLK
TRI-STATE is a registered trademark of National Semiconductor Incorporated.
1997 Microchip Technology Inc.
DO
CLK
Tri-State is a trademark of National Semiconductor.
CS
DI
CLK
CS
CS
DI
DI
ERASE/WRITE Disable and Enable
(EWEN, EWDS)
TRI-STATE
TRI-STATE™
EWDS TIMING
EWEN TIMING
READ TIMING
1
CC
1
1
is removed from the device. To
1
0
0
0
0
• A
0
n
1
0
• • •
1
0
A0
0
X
X
Dx
• • •
3.7
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (x8 organization) or 16-bit
(x16 organization) output string. The output data bits
will toggle on the rising edge of the CLK and are stable
after the specified time delay (T
possible when CS is held high. The memory data will
automatically cycle to the next register and output
sequentially.
• • •
• • •
D0
READ
X
X
Dx*
T
T
CSL
CSL
• • •
93LC46/56/66
D0
Dx*
PD
.). Sequential read is
• • •
DS11168L-page 7
D0
T
CSL

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