X3100PT-V XICOR [Xicor Inc.], X3100PT-V Datasheet - Page 15

• Manufacturer Part Number: X3100PT-V
• Description: 3 or 4 Cell Li-Ion Battery Protection and Monitor IC
• Manufacturer: XICOR [Xicor Inc.]

X3100/X3101 – Preliminary Information
REV 1.1.8 12/10/02
Over-discharge Protection
If V
said to be in a over-discharge state (Figure 6). In this
instance, the X3100 and X3101 automatically switch
the discharge FET OFF (UVP/OCP=Vcc), and then
enter sleep mode.
The over-discharge (under-voltage) value, V
selected from the values shown in Table 5 by setting
bits VUV1, VUV0 in the configuration register. These
bits are set using the WCFIG command. Once in the
sleep mode, the following steps must occur before the
X3100 or X3101 allows the battery cells to discharge:
– The X3100 and X3101 must wake from sleep mode
– The charge FET must be switched ON by the micro-
– All battery cells must satisfy the condition: V
– The discharge FET must be switched ON by the micro-
The times T
connected between pin UVT and GND (Table 13). The
delay T
can be approximated by the following linear equation:
Table 21. Typical Over-discharge Delay Times
Sleep Mode
The X3100 or X3101 can enter sleep mode in two
ways:
i) The device enters the over-discharge protection mode.
ii) The user sends the device into sleep mode using the
Symbol
(see section “Voltage Regulator” on page 21).
controller (OVP/LMON=V
(see section “Control Register Functionality” on page
10).
V
controller (UVP/OCP=V
(see section “Control Register Functionality” on page
10)
T
T
control register.
CELL
UVR
UVR
UV
UV
for a time exceeding T
< V
that results from a particular capacitance C
Over-discharge
detection delay
Over-discharge
release time
UV
UV
T
/T
Description
, for a time exceeding T
UVR
T
UVR
UV
(ms) ≈ 70 x C
(s) ≈ 10 x C
are varied using a capacitor (C
SS
SS
), via the control register
), via the control register
UVR
UV
UV
0.1µF
0.1µF
C
.
(µF)
UV
(µF)
UV
, the cells are
1.0s (Typ)
7ms (Typ)
UV
Delay
CELL
, can be
www.xicor.com
>
UV
UV
)
,
A sleep mode can be induced by the user, by setting
the SLP bit in the control register (Table 13) using the
WCNTR Instruction.
In sleep mode, power to all internal circuitry is switched
off, minimizing the current drawn by the device to 1µA
(max). In this state, the discharge FET and the charge
FET are switched OFF (OVP/LMON=V
OCP=V
0V. Control of UVP/OCP and OVP/LMON via bits UVPC
and OVPC in the control register is also prohibited.
The device returns from sleep mode when V
(e.g. when the battery terminals are connected to a
battery charger). In this case, the X3100 or the X3101
restores the 5VDC regulated output (section “Voltage
Regulator” on page 21), and communication via the SPI
port resumes.
If the Cell Charge Enable function is enabled when V
rises above V
verifies that the individual battery cell voltages (V
are larger than the
before allowing the FETs to be turned on. The value
of V
bits VCE1–VCE0 in the configuration register.
Only if the condition “ V
the state of charge and discharge FETs be changed
via the control register
any battery cell then both the Charge FET and the
discharge FET are OFF (OVP/LMON=Vcc and UVP/
OCP=V
battery cells via terminals P+ / P- is prohibited
The cell charging threshold function can be switched
ON or OFF by the user, by setting bit SWCEN in the
configuration register (Table 7) using the WCFIG
command. In the case that this cell charge enable
function is switched OFF, then V
0V.
Neither the X3100 nor the X3101 enter sleep mode
(automatically or manually, by setting the SLP bit) if V
≥ V
into a sleep mode while the battery cells are at a high
voltage (e.g. during cell charging).
SLR
CE
1. In this case, charging of the battery may resume ONLY if the cell
charge enable function is switched OFF by setting bit SWCEN =
1 in the configuration register (See Above, “Configuration
Register Functionality” on page 8).
is selected by using the WCFIG command to set
. This is to ensure that the device does not go
CC
CC
), and the 5VDC regulated output (V
). Thus both charge and discharge of the
SLR
, the X3100 and X3101 internally
Characteristics subject to change without notice.
cell charge enable voltage (V
. Otherwise, if V
CELL
> V
CE
CE
is effectively set to
” is satisfied can
CELL
CC
CC
and UVP/
1
< V
.
RGO
≥ V
CE
CELL
15 of 40
SLR
CE
) is
CC
CC
for
)
)
.