R2J20602NP-G3 RENESAS [Renesas Technology Corp], R2J20602NP-G3 Datasheet - Page 14

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R2J20602NP-G3

Manufacturer Part Number
R2J20602NP-G3
Description
Integrated Driver - MOS FET (DrMOS)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
R2J20602NP
PCB Layout Example
Figure 2 shows an example of a PCB layout for the R2J20602NP in application. The several ceramic capacitors (e.g. 10
F) close to VIN and PGND can be expected to decrease switching noise and improve efficiency. In that case, all
sections of the GND pattern must be connected with other PCB layers via low impedances. Moreover, the wide VSWH
pattern can be expected to have the effect of dissipating heat from the low-side MOS FET.
When R2J20602NP is mounted on small circuit boards, such as those for point-of-load (POL) applications, heating of
the device can be alleviated by adding thermal via-holes under the VIN and VSWH pads.
REJ03G1480-0500 Rev.5.00 Mar 12, 2010
Page 12 of 14
GND
Figure 2 R2J20602NP PCB Layout Example (Top View)
VSWH
To inductor
10 µF
10 µF
GND
DISBL#
0.1 µF
PWM
Vin
BOOT
To
1 µF
GND
VLDRV
BOOT
VCIN
10 µF
10 µF
1 µF
1 µF
GND
Via hole

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