ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 177

• Manufacturer Part Number: ATMEGA8L
• Description: 8-bit AVR with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Table 66. Status codes for Master Transmitter Mode
2486M–AVR–12/03
Status Code
(TWSR)
Prescaler Bits
are 0
0x08
0x10
0x18
0x20
0x28
0x30
0x38
Status of the Two-wire Serial
Bus and Two-wire Serial Inter-
face Hardware
A START condition has been
transmitted
A repeated START condition
has been transmitted
SLA+W has been transmitted;
ACK has been received
SLA+W has been transmitted;
NOT ACK has been received
Data byte has been transmitted;
ACK has been received
Data byte has been transmitted;
NOT ACK has been received
Arbitration lost in SLA+W or data
bytes
This scheme is repeated until the last byte has been sent and the transfer is ended by
generating a STOP condition or a repeated START condition. A STOP condition is gen-
erated by writing the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
After a repeated START condition (state 0x10) the Two-wire Serial Interface can access
the same Slave again, or a new Slave without transmitting a STOP condition. Repeated
START enables the Master to switch between Slaves, Master Transmitter mode and
Master Receiver mode without losing control of the bus..
TWCR
value
TWCR
value
To/from TWDR
Load SLA+W
Load SLA+W or
Load SLA+R
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
TWINT
TWINT
Application Software Response
1
1
STA
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TWEA
TWEA
X
X
STO
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
To TWCR
TWSTA
TWSTA
TWINT
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TWEA
TWSTO
TWSTO
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
0
Next Action Taken by TWI Hardware
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+R will be transmitted;
Logic will switch to Master Receiver mode
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Two-wire Serial Bus will be released and not addressed
Slave mode entered
A START condition will be transmitted when the bus be-
comes free
TWWC
TWWC
X
X
TWEN
TWEN
1
1
ATmega8(L)
–
0
–
0
TWIE
TWIE
X
X
177