MC908GR16ACFA FREESCALE [Freescale Semiconductor, Inc], MC908GR16ACFA Datasheet - Page 154

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MC908GR16ACFA

Manufacturer Part Number
MC908GR16ACFA
Description
M68HC08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheets

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Enhanced Serial Communications Interface (ESCI) Module
For an 8-bit character, data sampling of the stop bit takes the receiver 9 bit times × 16 RT cycles
+ 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
the count of the transmitting device is 10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver 10 bit times × 16 RT cycles
+ 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
the count of the transmitting device is 11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 9-bit
character with no errors is:
14.4.3.6 Receiver Wakeup
So that the MCU can ignore transmissions intended only for other receivers in multiple-receiver systems,
the receiver can be put into a standby state. Setting the receiver wakeup bit, RWU, in SCC2 puts the
receiver into a standby state during which receiver interrupts are disabled.
Depending on the state of the WAKE bit in SCC1, either of two conditions on the RxD pin can bring the
receiver out of the standby state:
154
1. Address mark — An address mark is a 1 in the MSB position of a received character. When the
2. Idle input line condition — When the WAKE bit is clear, an idle character on the RxD pin wakes the
WAKE bit is set, an address mark wakes the receiver from the standby state by clearing the RWU
bit. The address mark also sets the ESCI receiver full bit, SCRF. Software can then compare the
character containing the address mark to the user-defined address of the receiver. If they are the
same, the receiver remains awake and processes the characters that follow. If they are not the
same, software can set the RWU bit and put the receiver back into the standby state.
receiver from the standby state by clearing the RWU bit. The idle character that wakes the receiver
does not set the receiver idle bit, IDLE, or the ESCI receiver full bit, SCRF. The idle line type bit,
ILTY, determines whether the receiver begins counting 1s as idle character bits after the start bit
or after the stop bit.
RECEIVER
RT CLOCK
MC68HC908GR16A Data Sheet, Rev. 1.0
Figure
Figure
154 160
------------------------- -
170 176
------------------------- -
Figure 14-9. Fast Data
154
170
STOP
14-9, the receiver counts 154 RT cycles at the point when
14-9, the receiver counts 170 RT cycles at the point when
×
×
100
100
SAMPLES
=
=
DATA
3.90%
3.53%
IDLE OR NEXT CHARACTER
Freescale Semiconductor

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