MC908GR16ACFA FREESCALE [Freescale Semiconductor, Inc], MC908GR16ACFA Datasheet - Page 179

• Manufacturer Part Number: MC908GR16ACFA
• Description: M68HC08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

low while the SIM counter counts out 4096 + 32 CGMXCLK cycles. Thirty-two CGMXCLK cycles later,
the CPU is released from reset to allow the reset vector sequence to occur. The SIM actively pulls down
the RST pin for all internal reset sources.
15.3.2.6 Monitor Mode Entry Module Reset (MODRST)
The monitor mode entry module reset (MODRST) asserts its output to the SIM when monitor mode is
entered in the condition where the reset vectors are erased ($FF) (see
When MODRST gets asserted, an internal reset occurs. The SIM actively pulls down the RST pin for all
internal reset sources.
15.4 SIM Counter
The SIM counter is used by the power-on reset module (POR) and in stop mode recovery to allow the
oscillator time to stabilize before enabling the internal bus (IBUS) clocks. The SIM counter also serves as
a prescaler for the computer operating properly module (COP). The SIM counter is 12 bits long.
15.4.1 SIM Counter During Power-On Reset
The power-on reset module (POR) detects power applied to the MCU. At power-on, the POR circuit
asserts the signal PORRST. Once the SIM is initialized, it enables the clock generation module (CGM) to
drive the bus clock state machine.
15.4.2 SIM Counter During Stop Mode Recovery
The SIM counter also is used for stop mode recovery. The STOP instruction clears the SIM counter. After
an interrupt, break, or reset, the SIM senses the state of the short stop recovery bit, SSREC, in the
CONFIG1 register. If the SSREC bit is a 1, then the stop recovery is reduced from the normal delay of
4096 CGMXCLK cycles down to 32 CGMXCLK cycles. This is ideal for applications using crystals with
the OSCENINSTOP bit set. External crystal applications should use the full stop recovery time, SSREC
cleared, if the OSCENINSTOP bit is cleared.
15.4.3 SIM Counter and Reset States
External reset has no effect on the SIM counter. See
free-running after all reset states. See
internal reset recovery sequences.
15.5 Exception Control
Normal, sequential program execution can be changed in three different ways:
Freescale Semiconductor
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•
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Interrupts:
–
–
Reset
Break interrupts
Maskable hardware CPU interrupts
Non-maskable software interrupt instruction (SWI)
MC68HC908GR16A Data Sheet, Rev. 1.0
15.3.2 Active Resets from Internal Sources
15.6.2 Stop Mode
19.3.1.1 Normal Monitor
for details. The SIM counter is
for counter control and
SIM Counter
Mode).
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