MB90F654A FUJITSU [Fujitsu Component Limited.], MB90F654A Datasheet - Page 69

• Manufacturer Part Number: MB90F654A
• Description: 16-bit Proprietary Microcontroller
• Manufacturer: FUJITSU [Fujitsu Component Limited.]

15. Delayed Interrupt Generation Module
(1) Register Details
(2) Block Diagram
The delayed interrupt generation module is used to generate the task switching interrupt. Interrupt requests to
the F
The DIRR register controls generation and clearing of delayed interrupt requests. Writing “1” to the register
generates a delayed interrupt request. Writing “0” to the register clears the delayed interrupt request. The register
is set to the interrupt cleared state by a reset. Either “0” or “1” can be written to the reserved bits. However,
considering possible future extensions, it is recommended that the set bit and clear bit instructions are used for
register access.
Delayed interrupt generation /release register (DIRR)
2
MC-16L CPU can be generated and cleared by software using this module.
R/W
Address : 00009F
—
: Readable and writable
: Unused
H
bit 15
—
Delayed interrupt generation/release decoder
bit 14
—
bit 13
—
Interrupt latch
bit 12
—
bit 11
—
MB90650A Series
bit 10
—
bit 9
—
R/W
bit 8
R0
Initial value
- - - - - - - 0
B
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