GS88018AT-133 ETC, GS88018AT-133 Datasheet - Page 14

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GS88018AT-133

Manufacturer Part Number
GS88018AT-133
Description
512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
Manufacturer
ETC
Datasheet
AC Test Conditions
DC Electrical Characteristics
Rev: 1.02 9/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
3.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
Output reference level
Input reference level
Output Leakage Current
Input Leakage Current
Input high level
Input slew rate
Output High Voltage
Output High Voltage
Input low level
Output Low Voltage
(except mode pins)
Parameter
Output load
ZZ Input Current
FT Input Current
Parameter
DQ
Conditions
V
Symbol
DD
V
V
V
1 V/ns
V
Fig. 1
V
0.2 V
I
I
I
DDQ
OH2
OH3
I
IN1
IN2
OL
DD
IL
OL
– 0.2 V
/2
/2
* Distributed Test Jig Capacitance
Output Load 1
14/26
V
DDQ/2
Output Disable, V
I
I
OH
OH
50
= –8 mA, V
= –8 mA, V
Test Conditions
GS88018/32/36AT-250/225/200/166/150/133
V
0 V V
V
0 V V
V
DD
DD
IN
I
OL
= 0 to V
= 8 mA
V
V
30pF
IN
IN
IN
IN
DDQ
DDQ
OUT
DD
*
V
V
= 2.375 V
= 3.135 V
V
V
= 0 to V
IH
IH
IL
IL
DD
© 2001, Giga Semiconductor, Inc.
–100 uA
–1 uA
–1 uA
–1 uA
–1 uA
–1 uA
1.7 V
2.4 V
Min
100 uA
Max
0.4 V
1 uA
1 uA
1 uA
1 uA
1 uA

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