GS88018AT-133 ETC, GS88018AT-133 Datasheet - Page 17

• Manufacturer Part Number: GS88018AT-133
• Description: 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
• Manufacturer: ETC

Rev: 1.02 9/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Write Cycle Timing
DQ
A
B
ADSC
A
ADSP
–
A
0
ADV
DQ
GW
–
–
BW
CK
An
B
E
E
E
G
D
D
1
2
3
Hi-Z
Single Write
tS tH
tS tH
tS tH
tS tH
tS tH
WR1
tS tH
ADV must be inactive for ADSP Write
tS tH
tS tH
tS tH
tS tH
tS tH
WR1
WR1
D1
A
E
2
and E
WR2
t
KH
3
Write specified byte for 2
17/26
only sampled with ADSP or ADSC
t
KL
WR2
WR2
Burst Write
D2
A
tKC
D2
ADSP is blocked by E inactive
E
GS88018/32/36AT-250/225/200/166/150/133
B
1
masks ADSP
D2
A
and all bytes for 2
C
D2
D
Write
ADSC initiated write
WR3
WR3
WR3
D3
B
© 2001, Giga Semiconductor, Inc.
A
Deselected with E
, 2
C
& 2
Deselected
D
2