CDP1854 Intersil Corporation, CDP1854 Datasheet - Page 10

• Manufacturer Part Number: CDP1854
• Description: Programmable Universal Asynchronous Receiver/Transmitter (UART)
• Manufacturer: Intersil Corporation

Dynamic Electrical Specifications
NOTES:
NOTES:
1. Typical values for T
2. Maximum limits of minimum characteristics are the values above which all devices function.
1. The holding register is loaded on the trailing edge of TPB.
2. The Transmitter Shift Register is loaded on the first high-to-low transition of the clock which occurs at least 1/2 clock period + t
3. Write is the overlap of TPB, CS1, and CS3 = 1 and CS3, RD/WR = 0.
TRANSMITTER TIMING - MODE 1
Minimum Clock Period
Minimum Pulse Width
Minimum Setup Time
Propagation Delay Time
TRANSMITTER HOLDING
the trailing edge of TPB and transmission of a start bit occurs 1/2 clock period + t
Clock Low Level
Clock High Level
TPB
TPB to Clock
Clock to Data Start Bit
TPB to THRE
Clock to THRE
REGISTER LOADED
WRITE (TPB)
T CLOCK
(NOTE 3)
(NOTE 1)
THRE
SDO
PARAMETER
A
= 25
o
t
C and nominal voltages.
TC
t
TT
t
TTH
FIGURE 3. TRANSMITTER TIMING DIAGRAM - MODE 1
T
(See Figure 3)
1
A
= -40
TRANSMITTER SHIFT
REGISTER LOADED
(NOTE 2)
CDP1854A, CDP1854AC
t
t
t
t
t
CTH
t
t
TTH
t
2
t
t
CC
CH
CD
CL
TT
TC
CH
CD
o
C to +85
3
t
CC
t
CTH
o
V
4
t
(V)
CL
C, V
10
10
10
10
10
10
10
10
DD
5
5
5
5
5
5
5
5
5-51
DD
5
5%, t
(NOTE 1)
6
TYP
250
125
100
100
100
175
300
150
200
100
200
100
75
75
50
90
R
, t
7
CDP1854A
F
= 20ns, V
14
CD
(NOTE 2)
later.
MAX
15
310
155
125
100
125
100
150
225
150
450
225
300
150
300
150
75
IH
= 0.7 V
LIMITS
16
(NOTE 1)
DD
1
TYP
250
100
100
100
175
300
200
200
, V
1ST DATA BIT
-
-
-
-
-
-
-
-
CDP1854AC
IL
2
t
= 0.3 V
CD
3
(NOTE 2)
DD
MAX
310
125
125
150
225
450
300
300
4
, C
-
-
-
-
-
-
-
-
L
= 100pF,
UNITS
TC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
after