PSB4596 Siemens Semiconductor Group, PSB4596 Datasheet - Page 13

• Manufacturer Part Number: PSB4596
• Description: Analog Line Interface Solution ALIS
• Manufacturer: Siemens Semiconductor Group

Pin No.
2.3
Semiconductor Group
8
9
25
24
21
20
23
15
17
16
18
10
Pin Definition of ALIS-D PSB 4596
Symbol
VDD
GND
VDDA
GNDA
MCLK1
MCLK2
RESET
FSC
DAT_IN /
SEL
DAT_OUT
DAT_CLK
CS
Power
Function
Power
Power
Power
I
O
I
BI
I
O
I
I
13
Description
+5 Volt supply for the digital circuitry
Ground digital: All signals are referred to
this pin
+5 Volt supply for the analog circuitry
Ground analog: All analog signals are
referred to this pin
Master clock1: One pin of a crystal or
ceramic resonator is connected. This pin
can also be driven from an external
clocking source of 16.384 MHz,
synchronous to FSC (MCLK=FSC*2048)
Master clock2: The other pin of a crystal or
ceramic resonator is connected. When
MCLK1 is driven by an external clock, this
pin should be left open
Reset input: Forces the device to default
mode (low active)
As input: Frame synchronisation clock,
8kHz, identifies the beginning of the
frame. FSC must be synchronous to
MCLK (MCLK=FSC*2048)
As Output: Indicates the beginning of a
new frame
Data interface: Receive data from the
DSP. The data is received in 16-bit bursts
every 125 ms.
Interface selection pin in MUX mode.
Data interface: Transmit data to the DSP.
The data is transmitted in 16-bit bursts
every 125 ms
Data clock 128 to 1024 kHz: Determines
the rate at which data is shifted into or out
of the data interface
to read or write data. Active low
-controller interface: Chip select enable
Analog Line Interface Solution
Pin Definition and Functions
PSB 4595 / PSB 4596
Data Sheet 06.98