PSB4596 Siemens Semiconductor Group, PSB4596 Datasheet - Page 43

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PSB4596

Manufacturer Part Number
PSB4596
Description
Analog Line Interface Solution ALIS
Manufacturer
Siemens Semiconductor Group
Datasheet

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6.2.5
Default value: 00H
AGR_Z
AGR_R
AGX
Int_en
Fsc_en
1
Semiconductor Group
Note: the sum of AGR_Z and AGX should be zero for stability reasons.
Bit
AGR_Z = 00:
AGR_Z = 11:
AGR_Z = 10:
AGR_Z = 01:
AGR_R = 00:
AGR_R = 01:
AGR_R = 11:
AGX = 00:
AGX = 01:
AGX = 10:
AGX = 11:
Int_en = 1:
Int_en = 0:
Fsc_en = 0:
Fsc_en = 1
CR4 Configuration Register 4 (Analog Gain)
AGR_
Z 1
7
Analog gain in impedance loop (can be used as AGC)
Analog gain in receive direction (can be used as AGC)
Analog gain in transmit direction (can be used as AGC)
Interrupt enable
FSC signal-source selection
AGR_
Analog gain A disabled (0 dB amplification)
Analog gain A enabled (2.5 dB amplification)
Analog gain A enabled (6 dB amplification)
Analog gain A enabled (-3.5 dB amplification)
Analog gain B disabled (0 dB amplification)
Analog gain B enabled (3.5 dB amplification)
Analog gain B enabled (6 dB amplification)
Analog gain A disabled (0 dB amplification)
Analog gain A enabled (-6 dB amplification)
Analog gain A enabled (3.5 dB amplification)
Analog gain A enabled (-2.5 dB amplification)
Enable interrupts
Disable interrupts
FSC must be generated externally
FSC generated internally
Z 0
6
AGR_
R 1
5
AGR_
R 0
4
43
AGX 1
Analog Line Interface Solution
3
AGX 0
2
PSB 4595 / PSB 4596
Programming ALIS
1)
Int_en
1
Data Sheet 06.98
Fsc_
en
0

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