T5761 ATMEL [ATMEL Corporation], T5761 Datasheet - Page 14

• Manufacturer Part Number: T5761
• Description: UHF ASK/FSK Receiver
• Manufacturer: ATMEL [ATMEL Corporation]

T5760 T5761
14 (32)
Dem_out
Data_out (DATA)
DATA_CLK
Dem_out
Data_out (DATA)
DATA_CLK
Dem_out
Data_out (DATA)
DATA_CLK
/
’1’
’1’
’1’
Receiving mode,
data clock control
logic active
Figure 22. Data clock disappears because of a logical error
Figure 21. Data clock disappears because of a timing error
Bit check ok
Bit–check mode
Preliminary Information
Timing error
’1’
’1’
’1’
Figure 20. Timing diagram of the data clock
Receiving mode,
data clock control
logic active
’1’
’1’
’1’
(T
T
ee
ee
Preburst
< T
’1’
’1’
’0’
Lim_min
OR T
T
’1’
’1’
Lim_max
’1’
2T
<T
Start bit
ee
Data
Data
’0’
’1’
< T
’0’
Logical error (Manchester code violation)
Lim_min_2T
Receiving mode,
bit check active
data clock control logic active
’1’
’1’
’?’
OR T
Receiving mode,
ee
> T
’1’
’1’
’0’
Lim_max_2T
t
Delay
)
Data
’0’
’0’
’0’
Receiving mode,
bit check aktive
’1’
’1’
’1’
Rev. A2, 19-Oct-00
t
P_Data_Clk
’0’
’0’
’0’