MAX11666AUB+ Maxim Integrated, MAX11666AUB+ Datasheet - Page 8

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MAX11666AUB+

Manufacturer Part Number
MAX11666AUB+
Description
Analog to Digital Converters - ADC 1/2Ch 12-Bit 500ksps Low Power SPI
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX11666AUB+

Rohs
yes
Number Of Channels
2
Architecture
SAR
Conversion Rate
500 KSPs
Resolution
12 bit
Input Type
Single-Ended
Interface Type
SPI
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
uMAX-10
Maximum Power Dissipation
707.3 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
2.2 V to 3.6 V
ELECTRICAL CHARACTERISTICS (MAX11664) (continued)
(V
unless otherwise noted. Typical values are at T
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11663)
(V
values are at T
8
POWER SUPPLY
Positive Supply Voltage
Digital I/O Supply Voltage
Positive Supply Current
(Full-Power Mode)
Positive Supply Current
(Full-Power Mode), No Clock
Power-Down Current
Line Rejection
TIMING CHARACTERISTICS (Note 2)
Quiet Time
CS Pulse Width
CS Fall to SCLK Setup
CS Falling Until DOUT High-
Impedance Disabled
Data Access Time After SCLK
Falling Edge (Figure 2)
SCLK Pulse Width Low
SCLK Pulse Width High
Data Hold Time From SCLK
Falling Edge
SCLK Falling Until DOUT High
Impedance
Power-Up Time
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Unadjusted Error
DD
DD
______________________________________________________________________________________
= 2.2V to 3.6V, V
= 2.2V to 3.6V. f
PARAMETER
PARAMETER
A
= +25NC.) (Note 1)
SCLK
REF
= 8MHz, 50% duty cycle, 500ksps. C
= V
DD
, V
OVDD
SYMBOL
SYMBOL
V
I
OVDD
I
I
DNL
V
OVDD
TUE
VDD
VDD
INL
I
OE
GE
t
PD
DD
t
t
t
t
t
t
t
t
Q
1
2
3
4
5
6
7
8
= V
DD
A
, f
= +25NC.) (Note 1)
V
V
Leakage only
V
(Note 3)
(Note 3)
(Note 3)
(Note 3)
V
V
Percentage of clock period (Note 3)
Percentage of clock period (Note 3)
Figure 3
Figure 4 (Note 3)
Conversion cycle (Note 3)
No missing codes
Excluding offset and reference errors
AIN_
AIN_
DD
OVDD
OVDD
SCLK
= 2.2V to 3.6V,
= V
= V
= 8MHz, 50% duty cycle, 500ksps; C
= 2.2V to 3.6V
= 1.5V to 2.2V
GND
GND
DOUT
CONDITIONS
CONDITIONS
V
= 10pF, T
REF
= 2.2V
A
= -40NC to +125NC, unless otherwise noted. Typical
DOUT
MIN
MIN
2.2
1.5
2.5
10
40
40
10
4
5
1
5
= 10pF, T
Q0.15
Q0.3
TYP
0.17
TYP
1.5
1.3
Q1
A
= -40NC to +125NC,
MAX
MAX
1.67
16.5
Q0.5
Q0.5
Q1.3
Q1.3
V
3.6
0.1
10
15
60
60
14
DD
1
UNITS
UNITS
LSB/V
Cycle
LSB
LSB
LSB
LSB
LSB
Bits
mA
mA
FA
ns
ns
ns
ns
ns
ns
ns
%
%
V
V

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