C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 257

• Manufacturer Part Number: C8051F966-A-GQ
• Description: 8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
• Manufacturer: Silicon Labs

Specifications of C8051F966-A-GQ

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 24.5 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.8 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFP-80
• Mounting Style: SMD/SMT

19. Power Management
C8051F96x devices support 6 power modes: Normal, Idle, Stop, Low Power Idle, Suspend, and Sleep.
The power management unit (PMU0) allows the device to enter and wake-up from the available power
modes. A brief description of each power mode is provided in Table 19.1. Detailed descriptions of each
mode can be found in the following sections.
In battery powered systems, the system should spend as much time as possible in sleep mode in order to
preserve battery life. When a task with a fixed number of clock cycles needs to be performed, the device
should switch to normal mode, finish the task as quickly as possible, and return to sleep mode. Idle mode,
low power idle mode, and suspend mode provide a very fast wake-up time; however, the power savings in
these modes will not be as much as in sleep Mode. Stop Mode is included for legacy reasons; the system
will be more power efficient and easier to wake up when idle, low power idle, suspend, or sleep mode is
used.
Although switching power modes is an integral part of power management, enabling/disabling individual
peripherals as needed will help lower power consumption in all power modes. Each analog peripheral can
be disabled when not in use or placed in a low power mode. Digital peripherals such as timers or serial
busses draw little power whenever they are not in use. Digital peripherals draw no power in Sleep Mode.
Power Mode
Normal
Idle
Stop
Low Power
Idle
Suspend
Sleep
Device fully functional
All peripherals fully functional.
Very easy to wake up.
Legacy 8051 low power mode.
A reset is required to wake up.
Improved Idle mode that uses
clock gating to save power.
Similar to Stop Mode, but very fast
wake-up time and code resumes
execution at the next instruction.
Ultra Low Power and flexible
wake-up sources. Code resumes
execution at the next instruction.
Description
Table 19.1. Power Modes
Rev. 0.5
Pulse Counter
VBAT Monitor.
Pulse Counter
VBAT Monitor.
SmaRTClock,
SmaRTClock,
Comparator0,
Comparator0,
Any Interrupt.
Any Interrupt
Port Match,
Port Match,
Any Reset.
Wake-Up
Sources
RST pin,
RST pin,
N/A
All Internal Oscillators Disabled
All Oscillators except SmaRT-
Precision Oscillator Disabled
Selective Clock Gating
Power Supply Gated
System Clock Gated
Excellent MIPS/mW
No Code Execution
No Code Execution
No Code Execution
No Code Execution
Power Savings
Clock Disabled
Very Good
Very Good
Excellent
C8051F96x
Good
Good
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