C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 310

• Manufacturer Part Number: C8051F966-A-GQ
• Description: 8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
• Manufacturer: Silicon Labs

Specifications of C8051F966-A-GQ

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 24.5 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.8 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFP-80
• Mounting Style: SMD/SMT

C8051F96x
Internal Register Definition 24.8. CAPTUREn: SmaRTClock Timer Capture
SmaRTClock Addresses: CAPTURE0 = 0x00; CAPTURE1 = 0x01; CAPTURE2 =0x02; CAPTURE3: 0x03.
Internal Register Definition 24.9. ALARM0Bn: SmaRTClock Alarm 0 Match Value
SmaRTClock Address: ALARM0B0 = 0x08; ALARM0B1 = 0x09; ALARM0B2 = 0x0A; ALARM0B3 = 0x0B
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Note: The least significant bit of the timer capture value is CAPTURE0.0.
Note: The least significant bit of the alarm programmed value is ALARM0B0.0.
Name
Reset
Name
Reset
7:0
7:0 ALARM0[31:0] SmaRTClock Alarm 0 Programmed Value.
Type
Bit
Type
Bit
Bit
Bit
CAPTURE[31:0] SmaRTClock Timer Capture.
Name
R/W
R/W
Name
7
0
7
0
These 4 registers (ALARM0B3–ALARM0B0) are used to set an alarm event for the
SmaRTClock timer. The SmaRTClock alarm should be disabled (ALRM0EN=0)
when updating these registers.
R/W
R/W
These 4 registers (CAPTURE3–CAPTURE0) are used to read or set the 32-bit
SmaRTClock timer. Data is transferred to or from the SmaRTClock timer when
the RTC0SET or RTC0CAP bits are set.
6
0
6
0
R/W
R/W
5
0
5
0
R/W
R/W
CAPTURE[31:0]
Rev. 0.5
ALARM0[31:0]
4
0
4
0
Function
Function
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0