C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 16

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
C8051F96x
16
Table 15.5. Three-out-of-Six Decoding ................................................................. 211
Table 16.1. SFR Map (0xC0–0xFF) ...................................................................... 222
Table 16.2. SFR Map (0x80–0xBF) ....................................................................... 223
Table 16.3. Special Function Registers ................................................................. 224
Table 17.1. Interrupt Summary .............................................................................. 234
Table 18.1. Flash Security Summary .................................................................... 248
Table 19.1. Power Modes ...................................................................................... 257
Table 20.1. IPeak Inductor Current Limit Settings ................................................. 270
Table 23.1. Recommended XFCN Settings for Crystal Mode ............................... 288
Table 23.2. Recommended XFCN Settings for RC and C modes ......................... 289
Table 24.1. SmaRTClock Internal Registers ......................................................... 296
Table 24.2. SmaRTClock Load Capacitance Settings .......................................... 302
Table 24.3. SmaRTClock Bias Settings ................................................................ 303
Table 25.1. Pull-Up Resistor Current ..................................................................... 315
Table 25.2. Sample Rate Duty-Cycle Multiplier ..................................................... 315
Table 25.3. Pull-Up Duty-Cycle Multiplier .............................................................. 315
Table 25.4. Average Pull-Up Current (Sample Rate = 250 µs) ............................. 316
Table 25.5. Average Pull-Up Current (Sample Rate = 500 µs) ............................. 316
Table 25.6. Average Pull-Up Current (Sample Rate = 1 ms) ............................... 316
Table 25.7. Average Pull-Up Current (Sample Rate = 2 ms) ................................ 316
Table 26.1. Bit Configurations to select Contrast Control Modes .......................... 338
Table 27.1. Port I/O Assignment for Analog Functions ......................................... 353
Table 27.2. Port I/O Assignment for Digital Functions ........................................... 354
Table 27.3. Port I/O Assignment for External Digital Event Capture Functions .... 354
Table 28.1. SMBus Clock Source Selection .......................................................... 385
Table 28.2. Minimum SDA Setup and Hold Times ................................................ 386
Table 28.3. Sources for Hardware Changes to SMB0CN ..................................... 390
Table 28.4. Hardware Address Recognition Examples (EHACK = 1) ................... 391
Table 28.5. SMBus Status Decoding With Hardware ACK Generation Disabled
Table 28.6. SMBus Status Decoding With Hardware ACK Generation Enabled
Table 29.1. Timer Settings for Standard Baud Rates 
Table 29.2. Timer Settings for Standard Baud Rates 
Table 30.1. SPI Slave Timing Parameters ............................................................ 423
Table 31.1. SPI Slave Timing Parameters ............................................................ 443
Table 32.1. Timer 0 Running Modes ..................................................................... 446
Table 33.1. PCA Timebase Input Options ............................................................. 467
Table 33.2. PCA0CPM and PCA0PWM Bit Settings for PCA 
Table 33.3. Watchdog Timer Timeout Intervals1 ................................................... 479
(EHACK = 0) ....................................................................................... 398
(EHACK = 1) ....................................................................................... 400
Using The Internal 24.5 MHz Oscillator .............................................. 409
Using an External 22.1184 MHz Oscillator ......................................... 409
Capture/Compare Modules ................................................................ 469
Rev. 0.5

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