25LC1024-I/P Microchip Technology, 25LC1024-I/P Datasheet - Page 15

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25LC1024-I/P

Manufacturer Part Number
25LC1024-I/P
Description
IC EEPROM 1MBIT 20MHZ 8DIP
Manufacturer
Microchip Technology
Datasheet

Specifications of 25LC1024-I/P

Memory Size
1M (128K x 8)
Package / Case
8-DIP (0.300", 7.62mm)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
20MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
128 K x 8
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Access Time
50 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
10 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
25LC1024-I/P
Manufacturer:
MCP
Quantity:
1 136
Part Number:
25LC1024-I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
25LC1024-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.9
The Sector Erase function will erase all bits (FFh)
inside the given sector. A Write Enable (WREN) instruc-
tion must be given prior to attempting a Sector Erase.
This is done by setting CS low and then clocking out
the proper instruction into the 25LC1024. After all eight
bits of the instruction are transmitted, the CS must be
brought high to set the write enable latch.
The Sector Erase function is entered by driving CS
low, followed by the instruction code (Figure 2-9), and
three address bytes. Any address inside the sector to
be erased is a valid address.
FIGURE 2-9:
 2010 Microchip Technology Inc.
SECTOR ERASE
SCK
CS
SO
SI
SECTOR ERASE SEQUENCE
1
0
1
1
0
Instruction
2
1
3
1
4
0
5
High-Impedance
0
6
0
7
23 22 21 20
8
CS must then be driven high after the last bit if the
address or the Sector Erase will not execute. Once the
CS is driven high, the self-timed Sector Erase cycle is
started. The WIP bit in the STATUS register can be
read to determine when the Sector Erase cycle is
complete.
If a SECTOR ERASE instruction is given to an address
that has been protected by the Block Protect bits (BP0,
BP1) then the sequence will be aborted and no erase
will occur.
See Table 2-3 for Sector Addressing.
9 10 11
24-bit Address
29 30 31
2
1
0
25LC1024
DS22064D-page 15

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